Pulse Edge Control Circuit for Ultrahigh-Precision Width Control
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Solution Overview
Problem
Traditional PWM circuits face limitations in achieving ultrahigh-precision digital pulse signals due to constraints in system clock frequency, requiring complex calibration procedures and increased hardware complexity, which are either resource-intensive or fail to timely reflect precision changes.
Innovation Solution
A circuit and method incorporating a pulse edge control circuit, static calibration circuit, and dynamic calibration circuit to accurately control pulse widths and calculate step size information, eliminating the need for software intervention and additional delay cells, thus enabling high precision and adaptability across a wide pulse frequency range.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the system clock frequency is increased to achieve higher pulse precision, then the pulse precision is improved, but the power consumption and circuit complexity increase significantly
Solution Approach 1:
The patent divides the delay control into multiple discrete delay stages (first delay stage, second delay stage, etc.), each controlled by independent control signals. This segmentation allows precise control of pulse width without requiring high clock frequencies, thereby reducing power consumption while maintaining measurement precision.
Solution Approach 2:
The patent pre-calculates and stores delay values in lookup tables during the calibration phase. During actual operation, the pre-computed delay values are directly applied without real-time calculation, enabling high precision pulse generation with minimal computational overhead and low power consumption.
2Measurement precision
If software calibration procedures are used to calculate step size, then the pulse precision can be adjusted, but the system execution time increases and calibration cannot reflect changes timely
Solution Approach 1:
The patent replaces software-based calibration with a hardware-based calibration mechanism. The calibration circuit uses dedicated hardware components (counters, comparators, multiplexers) to automatically calculate and update delay parameters in real-time, eliminating software execution delays and enabling immediate reflection of precision changes.
Solution Approach 2:
The calibration circuit is designed to perform self-calibration automatically without external intervention. The system continuously monitors pulse signals and adjusts delay parameters through the calibration circuit, enabling real-time adaptation to changing conditions without consuming system execution time.
3Measurement precision
If additional delay cells are added to the delay chain for calibration, then the time precision can be improved, but the hardware complexity and device area increase
Solution Approach 1:
The patent designs the delay cells to serve multiple functions: they are used both for normal pulse width modulation and for calibration purposes. The same delay chain structure is utilized in both operational modes, eliminating the need for separate calibration-specific hardware and reducing overall device complexity.
Solution Approach 2:
The calibration circuit is integrated with the existing delay chain architecture rather than being added as a separate component. The control signals for calibration are merged with the normal operation control signals, and the calibration results are directly applied to the same pulse generation pathway, reducing hardware overhead.
4Measurement precision
If the delay chain is used to achieve high precision pulses, then the pulse precision is improved, but the delay varies with voltage, temperature, and process affecting reliability
Solution Approach 1:
The patent implements a feedback mechanism where the actual pulse signals are monitored and fed back to the calibration circuit. The calibration circuit continuously compares the expected delay with the actual delay and adjusts the delay parameters accordingly, compensating for variations caused by voltage, temperature, and process changes to maintain reliable and stable pulse precision.
Data Source
AI summary
A circuit, for generating ultrahigh-precision digital pulse signals comprises: a pulse edge control circuit used for delaying a signal on an input pin and accurately controlling positions of a rising edge and a falling edge of the pulse signal to accurately control the width of pulses and generate ultrahigh-precision pulses; a static calibration circuit used for calculating step size information representing the relationship between a work clock period of a system and a delay of delay cells in the pulse edge control circuit when the system is powered on to work, and storing the step size information, wherein the step size information is the number of delay cells through which the signal is propagated and passes within one system clock period; and a dynamic calibration circuit used for dynamically calculating step size information when a rising edge or a falling edge of each pulse in the input pin arrives.