Pulse Frequency Voltage Regulator for Audible Noise Avoidance
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Solution Overview
Problem
Existing voltage regulators face challenges in maintaining stable operation outside undesirable frequency bands, such as the audio frequency band, which can lead to resonation in circuit elements and generate audible noise.
Innovation Solution
The implementation of a voltage regulator with a pulse frequency control system, comprising counter circuits and digital-to-analog converter (DAC) circuits, which adjust the activation time and current drawn from the output based on count values, ensuring operation outside undesirable frequency bands.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If the voltage regulator operates in a fixed frequency mode, then the control is simple, but the regulator may operate within undesirable frequency bands causing resonation and audible noise
Solution Approach 1:
The patent implements dynamic frequency adjustment by introducing a pulse frequency control system that continuously monitors the operating frequency and adjusts the activation time of the switching element. The control circuit modifies the duty cycle dynamically based on feedback, allowing the regulator to adapt its frequency in real-time to avoid resonant frequencies and audible noise bands while maintaining stable operation.
Solution Approach 2:
The patent changes the operational parameters by implementing variable activation time control. The pulse frequency control circuit adjusts the duty cycle parameter dynamically, enabling the voltage regulator to shift its operating frequency away from undesirable bands. This parameter modification allows the system to maintain effective voltage regulation while avoiding resonation and audible noise.
2Object-affected harmful factors
If the pulse frequency is adjusted dynamically to avoid undesirable bands, then audible noise is reduced, but the device complexity increases due to additional control circuits
Solution Approach 1:
The patent employs a feedback mechanism where the pulse frequency control circuit monitors the operating frequency and uses this information to adjust the activation time. The control circuit receives feedback about the current frequency and automatically modifies the duty cycle to maintain operation outside undesirable frequency bands. This closed-loop feedback approach enables automatic noise reduction without requiring complex external control systems.
Solution Approach 2:
The pulse frequency control circuit is designed to perform multiple functions: it monitors frequency, determines when the regulator is operating in undesirable bands, and adjusts the activation time accordingly. By integrating these functions into a single control module, the patent reduces overall device complexity while achieving the goal of eliminating audible noise through dynamic frequency management.
3Stability of the object's composition
If the activation time is extended to maintain output voltage, then the output stability is improved, but the operating frequency may enter undesirable bands causing resonation
Solution Approach 1:
The patent implements dynamic adjustment of activation time based on real-time frequency monitoring. When the control circuit detects that the current activation time would cause operation in a resonant frequency band, it automatically modifies the duty cycle to shift the frequency away from the resonant band while maintaining sufficient energy transfer to preserve output voltage stability. This dynamic adaptation allows the system to balance stability and resonation avoidance.
Solution Approach 2:
The patent modifies the activation time parameter dynamically based on operating conditions. The pulse frequency control circuit adjusts the duty cycle parameter in real-time, extending or reducing the activation time as needed to maintain output stability while avoiding resonant frequencies. This parameter modulation enables the system to achieve both stable output and resonation-free operation under varying load conditions.
Data Source
AI summary
The present disclosure describes a system with a first counter circuit, a first converter circuit, a second counter circuit, and a second converter circuit. The first counter circuit is configured to output a first count value based on a comparison between a first reference value and a switched node value of a voltage regulator. The first converter circuit is configured to adjust an activation time of the voltage regulator based on the first count value. The second counter circuit is configured to output a second count value based on a comparison between a second reference value and the switched node value of the voltage regulator. The second converter circuit is configured to adjust an amount of current drawn away from an output of the voltage regulator based on the second count value.