Pulse Generator Circuit Prevents HVIC Latch Off
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Solution Overview
Problem
High-Voltage Integrated Circuits (HVICs) experience latch off failures when the off-time duration of the input signal is short, leading to failure in turning on power switching devices, and conventional solutions increase power consumption by generating multiple pulse signals in each cycle.
Innovation Solution
A circuit with a pulse generator that generates a first pulse signal after a given time interval following the de-assertion of the input signal, combined with a level-shift circuit and logic circuit to control switching devices, preventing latch off failures while reducing power consumption by generating a single pulse signal in each cycle.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional HVIC generates two pulse signals in each cycle of the input signal to prevent latch off failure, then the reliability of power switching device control is improved, but the power consumption increases
Solution Approach 1:
The pulse generator asserts the control signal in advance based on a predicted timing point before the actual rising edge of the input signal. By using a falling edge detector to generate a pulse signal that anticipates the next rising edge, the system ensures the control signal is ready before needed, preventing latch off failure without requiring continuous monitoring or multiple pulse signals per cycle.
Solution Approach 2:
The system uses the falling edge of the input signal itself to trigger the pulse generation for the next rising edge. The falling edge detector automatically generates the control pulse based on the input signal's own transitions, eliminating the need for external control or additional pulse signals, thereby reducing power consumption while maintaining reliability.
2Use of energy by moving object
If the HVIC does not assert control signal for short off-time input signal, then the power consumption is reduced, but the productivity of power converter decreases due to latch off failure
Solution Approach 1:
The system generates the control pulse in advance during the off-time period based on the falling edge detection, so that when the input signal transitions back to high state, the control signal is already asserted and ready to immediately turn on the power switching device. This preliminary action ensures continuous operation without productivity loss even during short off-time periods.
Solution Approach 2:
The falling edge detector continuously monitors the input signal and automatically triggers pulse generation in response to each falling edge. This feedback mechanism ensures that the system adapts to each cycle of the input signal, generating control pulses only when needed based on actual signal transitions, thereby maintaining productivity while minimizing unnecessary power consumption.
Data Source
AI summary
A circuit for controlling a power converter includes a pulse generator generating a first pulse signal and a second pulse signal in response to an input signal, the first pulse signal being asserted at a given time interval or thereafter after the input signal has been de-asserted, a level-shift circuit shifting a level of the first pulse signal to generate a first shifted signal and to shift a level of the second pulse signal to generate a second shifted signal, a logic circuit controlling a first-side switching device in response to the first and second shifted signals, and an output node outputting an output signal. The first-side switching device is coupled to a second side-switching device at the output node.