Digital Pulse Interpolation for Time Resolution
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Solution Overview
Problem
Current digital timing algorithms for detecting pulse arrival times and amplitudes are limited by high-speed ADC requirements, leading to increased costs, power consumption, and reduced time resolution when using lower sampling rates, which restricts their application in resource-constrained systems like digital spectrometers.
Innovation Solution
A digital processing technique that employs interpolation methods, specifically using a convolution kernel based on the sinc function and Gaussian, to accurately estimate the maximum value and time of arrival of digitized pulses, allowing for implementation in field programmable gate arrays (FPGAs) and digital signal processors (DSPs) with lower speed ADCs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If high-speed ADC is used to achieve accurate pulse arrival time detection, then time resolution is improved, but cost and power consumption increase
Solution Approach 1:
The patent replaces high-speed analog-to-digital conversion with digital signal processing techniques. Specifically, it uses digital constant fraction discrimination and interpolation methods to achieve accurate timing measurements without requiring high-speed ADC hardware, thereby reducing power consumption while maintaining time resolution performance
Solution Approach 2:
The patent changes the approach from hardware-based high-speed sampling to software-based digital processing. By using digital signal processing algorithms including constant fraction discrimination and interpolation, the system achieves accurate timing measurements at lower sampling rates, effectively changing the parameter of ADC speed requirement
2Measurement precision
If high-speed ADC is used to achieve accurate pulse arrival time detection, then time resolution is improved, but device cost increases
Solution Approach 1:
The patent replaces expensive high-speed ADC hardware with more economical digital processing techniques. By implementing constant fraction discrimination and interpolation algorithms in software or on FPGAs, the system achieves the same time resolution at lower hardware cost
Solution Approach 2:
The patent uses computationally intensive but hardware-efficient digital algorithms instead of expensive high-speed ADC hardware. The interpolation and constant fraction discrimination methods can be implemented on standard FPGAs or DSPs, providing a cost-effective solution
3Device complexity
If lower sampling rate is used to reduce cost and power consumption, then device complexity is reduced, but time resolution deteriorates
Solution Approach 1:
The patent uses feedback from multiple digital samples to reconstruct the pulse shape and determine arrival time. By using constant fraction discrimination with interpolation, the system feedback-processes the digital signal to achieve accurate timing even at lower sampling rates
Solution Approach 2:
The patent substitutes direct high-speed sampling with digital signal processing. The interpolation method reconstructs the pulse characteristics from lower-rate samples, effectively replacing the need for high-speed ADC with computational algorithms that maintain time resolution
4Adaptability or versatility
If digital processing is used instead of analog processing, then adaptability is improved, but device complexity increases
Solution Approach 1:
The patent implements a universal digital processing approach that can handle various pulse types and applications through software algorithms. The constant fraction discrimination and interpolation methods are adaptable to different detector types and measurement requirements, providing versatility without requiring hardware changes
Solution Approach 2:
The patent uses dynamic digital processing algorithms that can adapt to different pulse characteristics. The interpolation method and constant fraction discrimination can be adjusted for different sampling rates and pulse shapes, providing flexibility while using standardized digital processing blocks
Data Source
AI summary
A digital processing technique for measuring the time of arrival of a digitized electronic signal pulse for in-line implementation in a field programmable gate array or digital signal processor. For each detected pulse, an interpolation method is used to estimate its maximum M, M is multiplied by a fraction f, and a second interpolation method is used to estimate the time when the pulse reaches the value f·M, which is then taken as the pulse's time of arrival. Various interpolation methods may be used. A particularly accurate method employs convolution of the pulse data by a kernel that is the product of the sinc function and a Gaussian. Detector physics limited time resolutions of 2-5% of the sampling interval are demonstrated. Estimating M is useful in its own right for determining pulse amplitudes, for example as a measure of the energies of photons absorbed in a detector.