Pulse Interval Converter Ring Counters for Low-Power Sync Output

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Solution Overview

Problem

Existing converters face challenges in efficiently converting asynchronous pulse domain signals to synchronous digital domain signals, including high power consumption, large implementation area, and risk of data duplication, while failing to effectively handle pulse domain information transfer.

Innovation Solution

A converter comprising a ring configuration of counters that respond to positive and negative pulses, counting intervals between pulses and synchronizing the counts to produce synchronous digital domain signals, utilizing time-to-digital converters and asynchronous-to-synchronous interfaces to ensure accurate and efficient conversion.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If multiple P2V converters and ADCs are used to convert pulse domain signals, then conversion accuracy is improved, but power consumption and implementation area increase significantly

Engineering Contradiction:

Improveconversion accuracyVSAvoidpower consumption

Core Design Contradiction:

Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The patent combines multiple P2V converters and ADCs into a single integrated time-to-digital converter that directly measures pulse intervals and outputs digital values, eliminating the need for separate conversion stages and reducing overall power consumption while maintaining measurement accuracy

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The TDC circuit performs multiple functions (pulse interval measurement, time stamping, and digital output generation) within a single unified structure, replacing what would traditionally require multiple specialized components, thereby reducing both power consumption and implementation area

Inventive Principle:

Principle #6Universality (Multi-functionality)

2Measurement precision

If multiple P2V converters and ADCs are used to convert pulse domain signals, then conversion accuracy is improved, but implementation area increases

Engineering Contradiction:

Improveconversion accuracyVSAvoidimplementation area

Core Design Contradiction:

Measurement precisionVSArea of stationary object

Solution Approach 1:

The patent integrates pulse detection, interval measurement, and digital output generation into a single compact TDC module, consolidating what would traditionally require multiple discrete components (P2V converters and ADCs) into one unified circuit structure, thereby significantly reducing the total implementation area

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The TDC circuit embeds multiple measurement and conversion functions within a hierarchical structure where sub-functions are nested within the main conversion pipeline, allowing efficient space utilization and reducing overall implementation area while maintaining full functionality

Inventive Principle:

Principle #7Nested doll (Nesting)

3Reliability

If asynchronous-to-synchronous converters use start and stop bits for data transfer, then data integrity is improved, but communication overhead increases

Engineering Contradiction:

Improvedata integrityVSAvoidcommunication overhead

Core Design Contradiction:

ReliabilityVSQuantity of substance

Solution Approach 1:

The patent extracts the timing information directly from the pulse domain signal itself, using the actual pulse arrival times as the data encoding mechanism, thereby eliminating the need for separate start and stop bits that add communication overhead while maintaining data integrity through the inherent timing precision of the pulse signal

Inventive Principle:

Principle #2Taking out (Extraction)

4Device complexity

If asynchronous-to-synchronous converters operate without pulse domain processing, then circuit simplicity is improved, but capability to handle pulse domain information is lost

Engineering Contradiction:

Improvecircuit simplicityVSAvoidcapability to handle pulse domain information

Core Design Contradiction:

Device complexityVSAdaptability or versatility

Solution Approach 1:

The patent segments the conversion process into distinct functional stages (pulse detection, interval measurement, time stamping, and digital output) that can independently process pulse domain information, allowing the circuit to maintain simplicity in each stage while achieving comprehensive pulse domain handling capability through their coordinated operation

Inventive Principle:

Principle #1Segmentation

Data Source

PatentUS9843339B1Asynchronous pulse domain to synchronous digital domain converter

Publication Date: 2017.12.12 HRL LAB

AI summary

An asynchronous pulse domain to synchronous digital domain converter for converting pulse domain signals in an input asynchronous pulse domain data stream to synchronous digital domain signals in a data output stream. The converter comprises a plurality of counters arranged in a ring configuration with only one counter in the ring being responsive at any given time to positive and negative going pulses in the input asynchronous pulse domain data stream, each counter, when so responsive, counting a number of time units between either (i) a positive going pulse and an immediately following negative going pulse or (ii) a negative going pulse and an immediately following positive going pulse, the counts of the counters when so responsive being synchronously converted to synchronous digital domain signals in the data output stream. The disclosed asynchronous pulse domain to synchronous digital domain converter can be used with spike domain signals if desired.