Pulse-Inverted Equalizing Circuit for Eye Opening at High Data Rates
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Solution Overview
Problem
The increasing data transmission speeds in electronic devices are limited by constraints such as high integration, electrostatic discharge conditions, and inductor limitations, leading to reduced data transmission speed and increased chip size and cost.
Innovation Solution
An electronic device with a first and second equalizing circuit that generate phase-inverted and pulse-based signals to correct data signals, improving eye diagram performance by increasing the difference between logic high and low levels, thereby enhancing data transmission speed without affecting the original data.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If data transmission speed is increased, then communication performance is improved, but signal integrity deteriorates due to inter-symbol interference and eye closure
Solution Approach 1:
The equalizing circuit performs preliminary equalization processing on the data signal before transmission. By pre-compensating for signal distortion and generating equalized signals with adjusted amplitudes and phases, the circuit prepares the signal to resist inter-symbol interference and maintain eye opening, thereby enabling high-speed transmission while preserving signal integrity.
Solution Approach 2:
The equalizing circuit uses feedback mechanisms to continuously adjust equalization parameters based on received signal quality. By monitoring signal characteristics and dynamically modifying equalization coefficients, the circuit adapts to changing transmission conditions, maintaining optimal signal integrity even at increased transmission speeds.
2Reliability
If equalizing circuit is added to improve signal quality, then data transmission reliability is improved, but device complexity increases
Solution Approach 1:
The equalizing circuit merges multiple functions into a single integrated structure. By combining signal equalization, pulse generation, and output driving functions into one unified circuit block, the design achieves improved data transmission reliability without proportionally increasing overall device complexity.
Solution Approach 2:
The equalizing circuit is designed with multi-functionality to handle various signal conditions. By creating a universal circuit that can adapt to different data rates and signal characteristics through configurable parameters, the circuit improves reliability across multiple scenarios without requiring separate specialized circuits for each function.
Data Source
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AI summary
An electronic device includes: a first equalizing circuit configured to receive a data signal and output a first equalizing signal based on the data signal; a pulse generator configured to generate a first pulse signal and a second pulse signal in response to a rising edge and a falling edge of the data signal, respectively; a second equalizing circuit configured to output a second equalizing signal based on the first pulse signal and the second pulse signal that have been inverted; and an output terminal configured to output an output signal in which the first equalizing signal and the second equalizing signal have been summed.