Pulse Latch Logic Circuit for Power-Off Data Retention
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Solution Overview
Problem
Conventional pulse latch devices cannot store data when powered off, leading to data loss and requiring additional power-consuming storage components for data retention, making them unsuitable for low-power circuit applications.
Innovation Solution
A pulse latch circuit with a logic circuit design using two power supplies, including a primary and secondary power supply, where the secondary power supply maintains the storage circuit after the primary is switched off, allowing data storage and restoration through a network of gates and signals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If additional storage components are added to retain data when powered off, then data storage capability is improved, but power consumption and device complexity increase
Solution Approach 1:
The patent combines the pulse latch circuit with a storage component (flip-flop) to create an integrated system. The pulse latch handles real-time data processing while the flip-flop stores data when powered off, merging the functions of both components into a unified circuit that achieves data retention without requiring separate storage systems.
Solution Approach 2:
The patent designs a multi-functional circuit where the same circuitry serves multiple purposes: the pulse latch processes data during active operation, while the flip-flop provides data retention during power-off states. The circuit can operate in different modes (normal operation, sleep mode, restore mode) using the same components, reducing overall system complexity and power consumption.
2Reliability
If additional storage components are added to retain data when powered off, then data storage capability is improved, but device complexity increases
Solution Approach 1:
The patent integrates the pulse latch and flip-flop into a single unified circuit structure, sharing common signal paths and control logic. This merging approach allows the circuit to achieve data storage capability while minimizing the number of discrete components and interconnections required.
Solution Approach 2:
The circuit design allows components to serve multiple functions across different operating modes. The same logic gates and signal paths are reused for both real-time data processing and data retention operations, reducing the overall circuit complexity compared to having completely separate systems for each function.
3Reliability
If data is stored in non-power-off storage component, then data retention is improved, but additional storing and restoring times are consumed
Solution Approach 1:
The patent implements a sleep mode that prepares the circuit for power-off conditions in advance. Before complete power shutdown, the circuit transitions to sleep mode where data is proactively transferred to the flip-flop for retention. This preliminary action ensures data is already stored and ready for quick restoration when power is restored, minimizing actual data loss time.
Solution Approach 2:
The circuit uses feedback signals to monitor the power state and automatically trigger data transfer operations. When power is about to be cut off, feedback signals activate the storage function to save data. When power is restored, feedback signals initiate the restore function to retrieve data, creating an automated system that reduces manual intervention and speeds up the overall process.
Data Source
AI summary
A device for storing pulse latch with logic circuit and thus having signal maintaining function is provided, wherein the device is composed of a data signal, a scan data input signal, a stored signal, a choosing data input signal, a time clock signal, a restoring signal, a first signal channel, a scan latch, a second signal channel, a pulse latch, a normal output signal, an output signal, a first OR gate, a second OR gate, a third OR gate, a AND gate and an inverter connecting to one another. The device may store the data when being switch off and restore the data when being switch on again.