Pulse-Driven Level Shift Circuit for Low-Leakage Fast Switching
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Solution Overview
Problem
Traditional level shift circuits have high static power consumption and low signal transmission speed, which affects the overall performance of electronic devices, such as fingerprint identification devices, due to the simultaneous ON states of transistors leading to turn-on currents and leakage currents.
Innovation Solution
A level shift circuit design that includes a complementary signal generating unit, a high voltage pulse generating unit, and a shift and latch unit, where transistors are configured to avoid simultaneous ON states, eliminating static power consumption and enabling high-speed signal transmission by using phase inverters and delays to generate high voltage pulses for shifting signals from a low voltage domain to a high voltage domain.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by stationary object
If traditional level shift circuit is used, then level shift function is achieved, but static power consumption is high
Solution Approach 1:
The patent employs periodic action by using clock signals to control the switching of transistors in the level shift circuit. The circuit operates in periodic cycles where transistors are turned on only during specific clock phases to perform level shifting, and turned off during other phases to eliminate static power consumption. This periodic switching mechanism ensures that no current flows through the level shift path when not actively transferring signals, thereby resolving the contradiction between maintaining level shift function and reducing static power consumption.
2Speed
If traditional level shift circuit is used, then level shift function is achieved, but signal transmission speed is low
Solution Approach 1:
The patent applies dynamics by making the level shift circuit operational rather than static. The circuit uses dynamic switching controlled by clock signals to enable fast signal transmission only when needed. The transistors are dynamically turned on and off based on clock phases, allowing the circuit to achieve high signal transmission speed during active periods while consuming no static power during idle periods. This dynamic operation resolves the contradiction between speed and power consumption.
3Use of energy by stationary object
If transistors are configured to avoid simultaneous ON states, then static power consumption is reduced, but circuit complexity increases
Solution Approach 1:
The patent uses preliminary action by pre-configuring the transistor switching sequence through clock signal phases before actual signal transmission occurs. The clock signals are designed in advance to ensure that transistors in different voltage domains are turned on in a specific sequence that prevents simultaneous conduction. This pre-planned switching strategy simplifies the control logic while effectively preventing static power consumption, resolving the contradiction between power reduction and circuit complexity.
Data Source
AI summary
A level shift circuit includes a complementary signal generating unit, a high voltage pulse generating unit, and a shift and latch unit. The high voltage pulse generating unit is connected to the complementary signal generating unit and the shift and latch unit. The complementary signal generating unit is used to receive a target signal at a low voltage domain and output a complementary signal of the target signal and the target signal. The high voltage pulse generating unit is used to generate a high voltage pulse according to the target signal and complementary signal. The shift and latch unit is used to shift the target signal from the low voltage domain to a high voltage domain when a high voltage pulse is generated, and is used to latch and output the target signal at the high voltage domain.


