Pulse-Driven Level Shifter for False Trigger Immunity
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Solution Overview
Problem
Existing level shifters in DC-DC converters face issues with false triggering due to parasitic capacitance and high voltage supply switching, which complicates manufacturing and increases power dissipation, and they often require constant DC current and additional circuitry to manage voltage levels and propagation delays.
Innovation Solution
A level shifter design that operates without constant DC current, eliminates false triggering by preventing output stage changes during switching phases and parasitic capacitance, and uses a symmetrical structure with pulse generators to create voltage drops for set and reset signals, allowing transistors to be sized based on charge/discharge phases rather than maximal current flow.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If existing level shifters are used to translate logic levels between voltage domains, then voltage level translation is achieved, but false triggering occurs due to parasitic capacitance and high voltage supply switching
Solution Approach 1:
The pulse generator produces set and reset pulses in advance of the actual level transition requirement. By generating these control pulses proactively based on the input signal state, the circuit prepares the output stage before voltage switching occurs, preventing false triggering caused by parasitic capacitance discharge during the transition.
Solution Approach 2:
The circuit uses periodic pulsing of the set and reset signals to control the output stage. Instead of continuous control, the pulse generator creates periodic pulses that actively manage the output state, ensuring clean transitions and preventing spurious triggering caused by voltage supply switching and parasitic effects.
2Stability of the object's composition
If constant DC current is used to drive the level shifter, then stable operation is achieved, but power dissipation increases
Solution Approach 1:
The pulse generator creates periodic set and reset pulses instead of using constant DC current. This pulsing approach drives the output stage only when state transitions are needed, dramatically reducing continuous power dissipation while maintaining stable operation during active transitions through the controlled periodic action of the pulses.
Solution Approach 2:
The circuit discards the continuous current consumption model and recovers energy efficiency by using pulsed current only when necessary for state transitions. The pulse generator approach allows the circuit to enter low-power states between transitions, eliminating wasteful continuous current flow while maintaining operational stability.
3Manufacturing precision
If additional circuitry is added to manage voltage levels and propagation delays, then voltage level translation accuracy is improved, but device complexity increases
Solution Approach 1:
The pulse generator serves multiple functions simultaneously: it generates set pulses, generates reset pulses, controls the timing of output transitions, and manages the interaction between different voltage domains. This single multi-functional component replaces what would otherwise require separate circuitry for each function, reducing overall device complexity while maintaining translation accuracy.
Solution Approach 2:
The pulse generator acts as an intermediary component between the input signal and the output stage. It mediates the voltage level translation by converting input signal changes into controlled set/reset pulses that drive the output, simplifying the overall circuit architecture while ensuring accurate voltage level translation without requiring complex direct coupling circuitry.
4Power
If transistors are sized based on maximal current flow, then current handling capability is improved, but the circuit becomes limited by gate-source voltage and maximal current flow
Solution Approach 1:
By using periodic pulsed current instead of continuous current, the transistor sizing is determined by the charge/discharge requirements during pulses rather than maximal continuous current flow. This allows transistors to be sized for the actual transient needs, improving voltage level adaptability across different domains while maintaining sufficient current handling capability during the pulsed operation cycles.
Data Source
AI summary
Some demonstrative embodiments include a level shifter to shift a high logic level and a low logic level of a Direct Current (DC) control signal of a first voltage domain to a high logic level and a low logic level of a second voltage domain, respectively.