Pulse Modulator Gate Drive Layout for Faster MOSFET Switching
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Solution Overview
Problem
Pulse modulators using solid-state switches face limitations in switching speed due to parasitic inductance and capacitance, which restricts the achievement of high switching speeds and flexibility in generating pulses for high power applications.
Innovation Solution
Incorporating a separate gate drive connected to ground for solid-state power switches, such as MOSFETs, IGBTs, and BJTs, and using an inductive adder configuration with magnetic cores and baluns to reduce source inductance and enhance switching speed, while also employing diodes and snubber networks to manage parasitic effects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If solid state power switches are used to control capacitor discharge, then flexibility in operating voltage, duty cycle and pulse width is improved, but parasitic inductance and capacitance reduce achievable switching speeds
Solution Approach 1:
The gate drive circuit is segmented into a separate ground path, isolating the gate drive ground from the source ground. This segmentation prevents parasitic inductance in the shared ground path from affecting switching speed, while maintaining the flexibility benefits of solid state switches.
Solution Approach 2:
A separate gate drive ground path acts as an intermediary, providing a dedicated return path for gate drive current that is electrically isolated from the main power circuit ground. This intermediary path eliminates the harmful interaction between parasitic inductance and switching speed.
2Power
If multiple cells are stacked together to meet higher power requirements, then power output is improved, but device volume increases
Solution Approach 1:
Multiple cell outputs are merged through an induction adder configuration where magnetic cores and windings combine the outputs of multiple cells. This merging approach achieves high power output by combining multiple lower-power cells into a unified high-power output, rather than requiring each cell to individually handle the full power load.
Solution Approach 2:
The induction adder uses magnetic coupling to combine cell outputs in a different dimensional space (magnetic field domain) rather than simple electrical parallel/series connections. This allows efficient power combination with reduced volumetric requirements compared to direct electrical stacking.
3Ease of manufacture
If short pulse widths are generated with relatively low cost components, then manufacturing cost is reduced, but achieving high pulse repetition rates becomes more challenging
Solution Approach 1:
The separate gate drive ground configuration changes the electrical parameters of the switching circuit, specifically reducing effective parasitic inductance. This parameter change enables faster switching speeds that allow short pulse widths and high repetition rates to be achieved simultaneously using cost-effective solid state components rather than expensive specialized devices.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables faster switching speeds, high power generation with short pulse widths and high repetition rates, achieving peak powers of tens of megawatts in a compact form, with flexibility in pulse characteristics and operation under demanding conditions.
Implementation Method 1
Parasitic inductance and capacitance of the switches reduce achievable switching speeds. However, by including the separate gate drive ground, the effect of the source inductance is reduced
Implementation Method 2
The induction adder enables high voltages and high currents to be obtained by inductively adding voltages from the plurality of cells. Each stage includes a magnetic induction core, a single turn primary winding and a single turn secondary winding
Implementation Method 3
During the switch transition, a voltage is induced across the source inductance due to the rate of change of current through it. This voltage opposes the gate voltage and reduces the voltage driving the current into the gate
Implementation Method 4
A Zener diode is included via which the separate gate drive is connected to ground. The Zener diode is used to prevent overvoltage of the device gate
Implementation Method 5
The diode prevents conduction of the switch parasitic antiparallel diode which might otherwise result in the switch latching into conduction, leading to failure
Implementation Method 6
A non-linear snubber network is included to dissipate reflected energy in a cell
Data Source
AI summary
A pulse modulator comprises a solid state power switch having a source, a drain, a gate and a separate gate drive connected to ground. One pulse modulator comprises a plurality of stages connected as an induction adder. Each stage includes a plurality of cells and at least some of the cells each include a solid state power switch having a source, a drain, a gate and a separate gate drive connected to ground to control the discharge of a capacitor. In one embodiment the solid state power switch is a power MOSFET.