Pulse Output Circuit Layout for Stable Heavy-Load Shift Registers

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Solution Overview

Problem

Driver circuits with transistors of the same conductivity type can experience unstable operation, particularly in pulse signal output circuits used in display devices, due to high power consumption and potential malfunctions under heavy load conditions.

Innovation Solution

A pulse signal output circuit design that includes a clock signal supplied to one transistor and a power supply potential applied to another, reducing power consumption and ensuring sufficient charge capability, while using transistors with oxide semiconductors to enhance mobility and reduce off-state current, thereby stabilizing operation under heavy load conditions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If a driver circuit includes only n-channel transistors (oxide semiconductors), then manufacturing complexity is reduced and field effect mobility is improved, but operation stability deteriorates due to potential malfunctions under heavy load

Engineering Contradiction:
Improvemanufacturing process simplicityVSAvoidoperation stability
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent applies local quality by differentiating the treatment of transistors based on their function and load conditions. Specifically, p-channel transistors are introduced in specific circuits (such as output circuits driving heavy loads) while maintaining n-channel transistors in other circuits. This localized adjustment of transistor type based on specific circuit requirements resolves the contradiction by maintaining manufacturing simplicity where possible while ensuring reliability where needed.

Inventive Principle:
Principle #3Local quality

2Power

If transistors are operated under heavy load conditions, then output capability is improved, but power consumption increases and malfunctions occur

Engineering Contradiction:
Improveoutput capabilityVSAvoidpower consumption
Core Design Contradiction:
PowerVSUse of energy by moving object

Solution Approach 1:

The patent applies parameter changes by carefully selecting and adjusting transistor parameters (such as threshold voltage, channel width, and length) to optimize the balance between output capability and power consumption. By changing these parameters, the circuit can deliver high output power when needed while minimizing unnecessary power consumption during normal operation.

Inventive Principle:
Principle #35Parameter changes

3Speed

If transistors with high field effect mobility are used (polycrystalline silicon), then operation speed is improved, but manufacturing complexity increases due to crystallization processes

Engineering Contradiction:
Improvefield effect mobilityVSAvoidmanufacturing process complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent applies this principle by using amorphous silicon transistors with lower mobility but simpler manufacturing, accepting that these transistors have limited operational lifespan or performance under extreme conditions. The lower-cost, easier-to-manufacture amorphous silicon transistors are used in applications where high speed is not critical, thereby avoiding the complex crystallization processes while maintaining adequate performance.

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

Data Source

PatentUS8923471B2Pulse signal output circuit and shift register
Publication Date: 2014.12.30 SEMICON ENERGY LAB CO LTD
  • US8923471B2 patent drawing
  • US8923471B2 patent drawing
  • US8923471B2 patent drawing

AI summary

A pulse signal output circuit capable of operating stably and a shift register including the pulse signal output circuit are provided. A clock signal is supplied to one of transistors connected to a first output terminal. A power supply potential is applied to one of transistors connected to a second output terminal. Thus, power consumed by discharge and charge of the transistor included in the second output terminal can be reduced. Further, since a potential is supplied from a power source to the second output terminal, sufficient charge capability can be obtained.