Pulse Power Ethernet Links With Offset Wire-Pair Data Timing

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Solution Overview

Problem

Conventional Power over Ethernet (PoE) and Power over Data Line (PoDL) systems are limited in power capacity, typically delivering up to 100 W, which is inadequate for many devices, and face interference issues during pulse power transitions that can corrupt data transmission.

Innovation Solution

The method involves transmitting pulse power as a sequence of voltage pulses offset between wire pairs to provide continuous power while controlling data transmission during pulse power transitions to prevent interference, using techniques such as suspending data transmission, applying Forward Error Correction, and marking packets for error or discard.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If pulse power transitions are used to increase power delivery capacity, then power delivery capacity is improved, but data transmission reliability deteriorates due to interference during transitions

Engineering Contradiction:
Improvepower delivery capacityVSAvoiddata transmission reliability
Core Design Contradiction:
PowerVSReliability

Solution Approach 1:

The patent extracts the harmful interference periods (pulse transitions) from the data transmission process by suspending data transmission during these periods. This separates the power delivery function from the data transmission function in time, allowing high-power pulse transitions to occur without corrupting data signals.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The system performs preliminary actions by suspending data transmission before pulse transitions occur and resuming it after transitions complete. This proactive timing control prevents data corruption before it can happen, ensuring reliable data transmission while maintaining high power delivery capacity.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If data transmission is suspended during pulse transitions, then data transmission reliability is improved, but productivity deteriorates due to transmission interruptions

Engineering Contradiction:
Improvedata transmission reliabilityVSAvoiddata transmission efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent implements periodic suspension and resumption of data transmission aligned with the periodic pulse power transitions. By synchronizing data transmission pauses with pulse transitions and resuming transmission during stable power periods, the system maintains high reliability while minimizing productivity loss through efficient use of available transmission windows.

Inventive Principle:
Principle #19Periodic action

3Reliability

If Forward Error Correction is applied to data transmitted during pulse power, then data transmission reliability is improved, but device complexity increases

Engineering Contradiction:
Improvedata transmission reliabilityVSAvoiderror correction complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies Forward Error Correction (FEC) coding to data packets before transmission during pulse power periods. This beforehand cushioning prepares the data with error-correcting capability, allowing the system to maintain high reliability even when transmitting during pulse transitions, while the FEC overhead is manageable compared to more complex error protection schemes.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

Data Source

PatentUS11848790B2Transmission of pulse power and data in a communications network
Publication Date: 2023.12.19 CISCO TECHNOLOGY INC
  • US11848790B2 patent drawing
  • US11848790B2 patent drawing
  • US11848790B2 patent drawing

AI summary

In one embodiment, a method includes transmitting pulse power on two wire pairs, the pulse power comprising a plurality of high voltage pulses with the high voltage pulses on the wire pairs offset between the wire pairs to provide continuous power, performing low voltage fault detection on each of the wire pairs between the high voltage pulses, and transmitting data on at least one of the wire pairs during transmittal of the high voltage pulses. Data transmittal is suspended during the low voltage fault detection.