Pulse Radar Signal Processing With Adaptive ADC Reference Control
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Solution Overview
Problem
Radar devices face challenges in detecting weak reflected signals from distant or small targets due to hardware complexity with high-resolution analog-to-digital converters and increased signal processing time with methods that increase integration.
Innovation Solution
A pulse radar device utilizing a low-resolution analog-to-digital converter and adaptive reference voltage, with a controller determining signal processing repetition based on output codes and threshold values, and decreasing the reference voltage magnitude with each repetition to optimize hardware area and processing time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a high-resolution analog-to-digital converter is used to detect weak reflected signals, then measurement precision is improved, but device complexity increases
Solution Approach 1:
The patent divides the signal processing task into multiple integration operations instead of relying on a single high-resolution ADC. By segmenting the detection process into multiple lower-resolution conversions followed by digital integration, the system achieves equivalent or superior detection precision without requiring complex high-resolution hardware
Solution Approach 2:
The patent uses multiple low-resolution ADCs (or repeated conversions by the same ADC) to create multiple copies of the signal measurement. These copies are then integrated digitally to achieve the effective precision of a single high-resolution measurement, avoiding the complexity of implementing one high-resolution converter
2Measurement precision
If the number of integrations is increased to detect minute signals, then measurement precision is improved, but loss of time increases
Solution Approach 1:
The patent employs periodic pulse transmission and corresponding periodic integration operations. By structuring the signal processing as a series of timed periodic operations rather than continuous processing, the system efficiently accumulates signal energy over multiple cycles while maintaining a predictable and optimized processing timeline
Solution Approach 2:
The patent performs preliminary integration of the received signal before the final detection decision. By pre-integrating the signal over multiple pulses and then comparing the integrated result against a threshold, the system achieves rapid detection without requiring extensive post-processing time
3Device complexity
If a low-resolution analog-to-digital converter is used to minimize hardware area, then device complexity is reduced, but measurement precision deteriorates
Solution Approach 1:
The patent enables the low-resolution ADC to perform multiple conversion operations that collectively achieve high-precision measurement. The system uses the same simple hardware resource (low-resolution ADC) repeatedly to generate multiple measurement values that are then integrated, allowing the simple converter to serve the complex function of high-precision detection through self-repetition
Solution Approach 2:
The patent changes the operational parameters of the low-resolution ADC by performing multiple conversions at different timing points during the pulse sequence. By varying the measurement parameters (timing, number of conversions) and integrating the results, the system effectively transforms the limited resolution of the ADC into sufficient detection precision for the application
Data Source
AI summary
A pulse radar device for performing a signal processing operation is provided, which includes a transmitting unit that radiates a transmission signal, a receiving unit that receives a reception signal from a target, and a signal processing unit that generates output codes based on the reception signal. The signal processing unit includes a plurality of integrators that generate integration signals based on the reception signal, a plurality of analog-to-digital converters (ADCs) that generate the output codes based on the integration signals, a clock controller that provides clock signals to the plurality of integrators and the plurality of ADCs, a voltage generator that applies an adaptive reference voltage to the plurality of ADCs, and a controller that determines whether to repeat the signal processing operation based on the output codes and the threshold value.


