Pulse Shifting Circuit for Sequential Anti-Fuse Rupture

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Solution Overview

Problem

Conventional semiconductor integrated circuits require multiple anti-fuse setting units for rupturing fuses, leading to increased area usage and potential degradation in fuse rupture reliability due to the need for high voltage application.

Innovation Solution

A semiconductor integrated circuit with a rupture instructing pulse generation unit, anti-fuse rupture units, and pulse shifting units that delay and generate delayed rupture instructing pulse signals, allowing for efficient rupture of multiple anti-fuses with reduced hardware requirements and improved reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If multiple anti-fuse setting units are used to rupture multiple fuses, then fuse rupture reliability is improved, but the area of the semiconductor integrated circuit increases

Engineering Contradiction:
Improvefuse rupture reliabilityVSAvoidarea of semiconductor integrated circuit
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent merges multiple anti-fuse setting units into a single unified unit that can sequentially rupture multiple anti-fuses. The pulse shifting unit generates delayed rupture instructing pulse signals to enable one setting unit to control multiple anti-fuses at different time points, thereby reducing the number of hardware components and decreasing circuit area while maintaining fuse rupture reliability

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent introduces temporal dynamics by using a pulse shifting unit to generate delayed rupture instructing pulse signals. This allows a single anti-fuse setting unit to dynamically control multiple anti-fuses at different time points, transforming a static spatial arrangement into a dynamic temporal sequence, thereby reducing hardware requirements and circuit area

Inventive Principle:
Principle #15Dynamics

2Reliability

If high voltage is applied to rupture a fuse, then fuse rupture reliability is improved, but the complexity of the circuit increases

Engineering Contradiction:
Improvefuse rupture reliabilityVSAvoidcircuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent enables the anti-fuse setting unit to self-configure for different anti-fuses by using a pulse shifting unit that automatically generates delayed rupture instructing pulse signals. This self-service mechanism eliminates the need for separate dedicated setting units for each anti-fuse, reducing circuit complexity while maintaining the high voltage rupture capability for reliability

Inventive Principle:
Principle #25Self-service

3Productivity

If multiple anti-fuse setting units are used, then multiple fuses can be ruptured simultaneously, but the number of hardware components increases

Engineering Contradiction:
Improvefuse rupture capabilityVSAvoidnumber of hardware components
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent uses periodic action by generating a series of delayed rupture instructing pulse signals at different time points. The pulse shifting unit creates this periodic sequence of pulses, allowing a single anti-fuse setting unit to sequentially rupture multiple anti-fuses, thereby maintaining productivity while reducing the number of hardware components through temporal multiplexing

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS8766694B2Pulse shifting circuit and semiconductor integrated circuit
Publication Date: 2014.07.01 SK HYNIX INC
  • US8766694B2 patent drawing
  • US8766694B2 patent drawing
  • US8766694B2 patent drawing

AI summary

A semiconductor integrated circuit includes a rupture instructing pulse generation unit configured to generate a rupture instructing pulse signal in response to a fuse rupture command signal and an address; a first anti-fuse rupture unit configured to perform an operation for rupturing a first anti-fuse during an enable period of the rupture instructing pulse signal, and generate rupture information of the first anti-fuse; a pulse shifting unit configured to delay the rupture instructing pulse signal and generate a delayed rupture instructing pulse signal; and a second anti-fuse rupture unit configured to perform an operation for rupturing a second anti-fuse during an enable period of the delayed rupture instructing pulse signal, and generate rupture information of the second anti-fuse.