Single-Line Pulse Signaling for Clock and Data Synchronization
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Solution Overview
Problem
Existing communication systems requiring separate terminals for transmitting clock information and data increase the number of components, leading to higher costs.
Innovation Solution
A controller and target configuration that generates a single pulse signal with synchronized edges for both clock information and data transmission, utilizing a clock signal generation circuit and pulse signal generation circuits to adjust edge timings based on data content.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If separate terminals are used for transmitting clock information and data, then communication reliability is improved, but device complexity and cost increase
Solution Approach 1:
The patent merges clock information transmission and data transmission into a single signal line. The transmitting device generates a pulse signal where one edge (rising or falling) represents clock information and the other edge represents data, allowing both functions to be conveyed through one terminal instead of requiring separate terminals for clock and data.
Solution Approach 2:
The single pulse signal line serves multiple functions: it transmits both clock information and data simultaneously. The receiving device can extract clock information from one edge of the pulse signal and data from the other edge, making the single signal line universal for both purposes.
2Reliability
If separate terminals are used for clock information and data transmission, then signal integrity is improved, but manufacturing cost increases
Solution Approach 1:
The patent combines clock information and data into a single pulse signal transmitted through one signal line, reducing the number of components and interconnections required. This simplification directly reduces manufacturing cost while the pulse signal structure maintains signal integrity through synchronized edge timing.
3Device complexity
If a single signal line is used for both clock and data transmission, then device complexity is reduced, but communication reliability may deteriorate
Solution Approach 1:
The pulse signal uses periodic edges (rising and falling edges) to encode information. Each cycle of the pulse signal provides both clock information (from one edge) and data (from the other edge), ensuring reliable periodic synchronization and data transmission through the single signal line.
Solution Approach 2:
The receiving device detects the pulse signal edges and generates corresponding internal clock signals and data signals. The synchronized edge detection mechanism provides implicit feedback that ensures accurate timing and data recovery, maintaining communication reliability despite using a single signal line.
Data Source
AI summary
A controller includes a clock signal generation circuit configured to generate a clock signal, and a first pulse signal generation circuit configured to generate a first pulse signal that has the same frequency as the clock signal and in which one of a rising edge or a falling edge is synchronized with the clock signal. The first pulse signal generation circuit is configured to adjust a timing of the other of the rising edge or the falling edge of each of cycles of the first pulse signal, according to content of each of data of a first data transmission.