Pulse Skip Circuit Adaptive Switch On-Time Control

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Solution Overview

Problem

Voltage converters operating in pulse skip mode (PSM) face challenges in maintaining a minimum on-time for high-side and low-side switches, leading to increased current ripple, which causes wear and tear on the inductor and load capacitor, especially under light load conditions.

Innovation Solution

A control circuit and voltage converter design that includes a pulse skip circuit to adaptively adjust the on-time of high-side and low-side switches by generating a second comparator signal with a lower gain error amplifier, reducing the duty-cycle signal and output current ripple during PSM.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If the voltage converter operates in pulse skip mode (PSM) under light load condition to reduce power consumption, then the power consumption is reduced, but the current ripple increases due to inability to maintain minimum on-time

Engineering Contradiction:
Improvepower consumptionVSAvoidcurrent ripple
Core Design Contradiction:
Use of energy by moving objectVSObject-generated harmful factors

Solution Approach 1:

The patent applies dynamics by making the on-time of switches variable rather than fixed. The control circuit dynamically adjusts the on-time of the high-side and low-side switches based on operating conditions, allowing the system to maintain minimum on-time requirements even when operating in PSM under light load conditions. This dynamic adjustment resolves the contradiction by enabling the system to reduce power consumption through PSM while simultaneously maintaining sufficient on-time to limit current ripple.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the parameter of switch on-time from a fixed minimum value to an adaptively adjusted value. By modifying the on-time parameter based on feedback from the control circuit, the system can operate in PSM mode with reduced power consumption while ensuring the on-time remains sufficient to prevent excessive current ripple. This parameter change allows the system to optimize both power consumption and current ripple performance.

Inventive Principle:
Principle #35Parameter changes

2Use of energy by moving object

If the switch on-time is reduced in PSM to further reduce power consumption, then the power consumption decreases, but the current ripple increases causing additional wear and tear on inductor and load capacitor

Engineering Contradiction:
Improvepower consumptionVSAvoidcomponent wear
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The control circuit dynamically determines the on-time of switches based on real-time operating conditions, preventing the on-time from becoming too short even when operating in PSM. This dynamic control ensures that power consumption is reduced while component stress and wear are minimized by maintaining appropriate on-time values.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent employs feedback mechanisms where the control circuit monitors operating conditions and adjusts switch on-time accordingly. This feedback loop ensures that the system maintains optimal balance between power consumption and component reliability, preventing excessive current ripple that would cause wear on inductors and capacitors while still achieving power savings through PSM operation.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS10122278B1Control circuit operating in pulse skip mode and voltage converter having the same
Publication Date: 2018.11.06 ANPEC ELECTRONICS CORPORATION
  • US10122278B1 patent drawing
  • US10122278B1 patent drawing
  • US10122278B1 patent drawing

AI summary

The present disclosure provides a control circuit operating in a pulse skip mode (PSM) and a voltage converter having the same, which adaptively adjust the related values in PSM through a pulse skip circuit. More specifically, the pulse skip circuit adaptively adjusts a second comparator signal indicating a second signal (related to a feedback signal with a lower gain) and/or indirectly adjusts a first comparator signal indicating a first signal (related to a feedback signal with a higher gain) to adaptively adjust the on-time of a high-side switch and the on-time of a low-side switch during PSM, thereby reducing the output current ripple.