Pulse Swallowing PFD Circuit for Low-Jitter PLL Multiplication
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Solution Overview
Problem
Phase locked loops (PLLs) face challenges in reducing jitter introduced by frequency dividers, which consume excess power and are costly, especially when used for frequency multiplication applications.
Innovation Solution
Implementing pulse swallowing circuitry in a phase frequency detector (PFD) that mimics frequency division, eliminating the need for integer dividers in the feedback network, thereby reducing jitter and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If integer dividers are used in the feedback network for frequency multiplication, then frequency division is achieved, but jitter increases and power consumption increases
Solution Approach 1:
The patent removes the integer divider from the feedback network entirely. Instead of using a separate divider component, the pulse swallowing circuitry is integrated directly into the phase frequency detector, extracting the frequency division function from its traditional location and eliminating the jitter-generating element.
Solution Approach 2:
The patent combines the frequency division function with the phase detection function by integrating pulse swallowing circuitry into the PFD. This merging eliminates the need for a separate divider component and reduces the number of jitter-introducing elements in the system.
2Measurement precision
If integer dividers are used in the feedback network, then frequency division is achieved, but power consumption increases
Solution Approach 1:
The patent combines the frequency division function with the phase detection function by integrating pulse swallowing circuitry into the PFD. This merging eliminates the need for a separate divider component and reduces the number of jitter-introducing elements in the system.
Solution Approach 2:
The phase frequency detector is designed to perform multiple functions: both phase detection and frequency division. The pulse swallowing circuitry enables the PFD to divide frequencies by swallowing N-1 pulses while detecting phase differences, making the detector universal and eliminating the need for separate functional blocks.
3Adaptability or versatility
If frequency division is performed using separate divider components, then the desired frequency ratio is achieved, but device complexity increases
Solution Approach 1:
The patent combines the frequency division function with the phase detection function by integrating pulse swallowing circuitry into the PFD. This merging eliminates the need for a separate divider component and reduces the number of jitter-introducing elements in the system.
Solution Approach 2:
The phase frequency detector is designed to perform multiple functions: both phase detection and frequency division. The pulse swallowing circuitry enables the PFD to divide frequencies by swallowing N-1 pulses while detecting phase differences, making the detector universal and eliminating the need for separate functional blocks.
Data Source
AI summary
An example apparatus includes: a first flip flop having a first output and a first reset input, a second flip flop having a first data input, a second output, and a second reset input, the second reset input coupled to the first reset input, a logic gate having a first logic input, a second logic input, and a first logic output, the first logic input coupled to the first output and the second logic input coupled to the second output, a delay cell having a delay cell input and a delay cell output, the delay cell input coupled to the first logic output and the delay cell output coupled to the first reset input and the second reset input, and pulse swallowing circuitry having a circuitry input and a circuitry output, the circuitry input coupled to the second output and the circuitry output coupled to the first data input.