Single-Link Pulse Timing Encoding for Multi-Channel Data Transfer

Solution Overview

Problem

Existing digital audio data transfer methods in electronic devices often require multiple wires, leading to issues like electromagnetic interference and increased cost, and they struggle with efficiently transmitting multiple channels of data with low latency.

Innovation Solution

A digital data transmission circuitry that uses a single data pulse with a rising and falling edge within each transfer period, where the timing of these edges encodes the data, allowing for reversible encoding and decoding of multiple data channels over a single communication link.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If multiple wires are used for digital audio data transfer, then data integrity is maintained, but electromagnetic interference and device complexity increase

Engineering Contradiction:
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent combines multiple data channels (left and right audio channels) into a single serial data wire, eliminating the need for separate wires for each channel. This merging approach reduces the number of wires from three or more to just one data wire, thereby reducing electromagnetic interference while maintaining data integrity through the use of a single shared communication medium with proper signaling protocols

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The single data wire serves multiple functions by carrying both left and right audio channel data sequentially, replacing the need for separate dedicated wires for each channel. This multi-functional use of a single wire reduces overall wire count and associated electromagnetic interference while maintaining full audio data transmission capability

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Productivity

If multiple wires are used for data transfer, then data transmission capability is improved, but device complexity and cost increase

Engineering Contradiction:
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent merges multiple data channels into a single serial communication wire, reducing the wire count from three or more to one. This consolidation maintains full data transmission capability for stereo audio by sequentially transmitting left and right channels through the same wire, thereby reducing device complexity and cost without sacrificing productivity

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent uses periodic time-division multiplexing to transmit left and right audio channels in alternating time slots over the single data wire. This periodic action allows both channels to be transmitted sequentially without loss of data transmission capability, while the single wire approach significantly reduces device complexity compared to parallel multi-wire solutions

Inventive Principle:
Principle #19Periodic action

3Measurement precision

If separate clock wire is used, then data synchronization is improved, but wire requirements and power consumption increase

Engineering Contradiction:
Core Design Contradiction:
Measurement precisionVSQuantity of substance

Solution Approach 1:

The patent merges the clock signal functionality into the data wire itself by using the timing of data transitions (rising and falling edges) as the clock reference. This eliminates the need for a separate clock wire, reducing wire requirements while maintaining precise data synchronization through the inherent timing information embedded in the data signal transitions

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The data signal itself provides the clock timing information through its transitions, making the system self-synchronizing without requiring an external dedicated clock wire. The receiver uses the rising and falling edges of the data signal to sample and synchronize to the transmitted data, allowing the data wire to serve both data transmission and clocking functions simultaneously

Inventive Principle:
Principle #25Self-service

4Productivity

If pulse density modulation is used, then bit rate is reduced, but noise at higher frequencies increases

Engineering Contradiction:
Core Design Contradiction:
ProductivityVSObject-generated harmful factors

Solution Approach 1:

The patent changes the modulation parameter from pulse density (PDM) to pulse timing position within a fixed period. Instead of varying pulse density to encode data, the invention uses the specific timing position of a single pulse within each time period to represent data values. This parameter change maintains a constant bit rate while reducing high-frequency noise compared to PDM, as the fixed periodic structure provides better spectral containment

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS9424849B2Data transfer
Publication Date: 2016.08.23
  • US9424849B2 patent drawing
  • US9424849B2 patent drawing
  • US9424849B2 patent drawing

AI summary

Circuitry for transferring multiple digital data streams, e.g. digital audio data, over a single communications link such as a single wire. A pulse-length-modulator is responsive to a plurality of data streams to generate a series of data pulses with a single data pulse having a rising and falling edge in each of a plurality of transfer periods defined by a first clock signal. The timing of the rising and falling edge of each data pulse is dependent on a combination of the then current data samples from the plurality of data streams. The duration and position of the data pulse in the transfer window in effect defines a data symbol encoding the data. An interface receives the stream of data pulses, and data extraction circuitry samples the data pulse to determine which of the possible data symbols the pulse represents and determines a data value for at least one received data stream.