Pulse-Triggered ADC Memory Capture for Low-Power Imaging
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Solution Overview
Problem
Current analog-to-digital conversion systems in imaging systems face challenges in reducing power consumption and enabling higher speed designs, particularly in the connection between comparators and memory elements without intervening pulse generators.
Innovation Solution
Incorporating pulse generators between comparators and memory devices in the analog-to-digital converter, which generate pulse signals in response to transitions of comparator output signals, allowing memory elements to capture counter values only during pulse signal duration, thereby reducing power consumption and facilitating faster transitions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If pulse generators are incorporated between comparators and memory devices, then power consumption in memory elements is reduced and conversion speed is improved, but device complexity increases
Solution Approach 1:
A pulse generator is introduced as an intermediary component between the comparator and memory device. The pulse generator receives the comparator output signal and generates a pulse signal that triggers the memory device to capture the counter value. This intermediary approach allows the memory device to remain in a low-power state during most of the conversion cycle, only activating briefly when needed, thereby reducing overall power consumption while maintaining functional capability.
Solution Approach 2:
The pulse generator produces periodic or triggered pulse signals that activate the memory device at specific moments during the analog-to-digital conversion process. Instead of keeping the memory device continuously active, the periodic pulse signals enable the memory to capture data only when required, reducing power consumption during idle periods while ensuring timely data capture for high-speed conversion.
2Productivity
If pulse generators are incorporated between comparators and memory devices, then conversion speed is improved, but device complexity increases
Solution Approach 1:
The pulse generator acts as a mediator that synchronizes the data capture operation with the conversion process. By generating precisely timed pulse signals, it ensures that the memory device captures the counter value at the optimal moment, improving conversion speed and timing precision without requiring the memory device to operate continuously at high speed, thus balancing performance with manageable complexity.
Solution Approach 2:
The pulse generator is configured to generate trigger pulses in advance or in precise synchronization with the comparator output transitions. This preliminary timing action ensures that the memory device is ready to capture the counter value exactly when needed, improving conversion speed by eliminating delays while maintaining a straightforward architectural implementation.
3Measurement precision
If memory elements capture counter values continuously, then data accuracy is maintained, but power consumption increases
Solution Approach 1:
The memory device captures counter values periodically based on pulse signals from the pulse generator, rather than continuously. Each pulse trigger corresponds to a specific conversion event, ensuring that data is captured accurately at the appropriate moment while the memory device remains in a low-power state between captures, thereby reducing power consumption without sacrificing data accuracy.
Solution Approach 2:
The pulse generator automatically generates trigger signals based on the comparator output transitions, enabling the memory device to capture data self-triggered by the conversion process itself. This self-service mechanism ensures that data accuracy is maintained by capturing values at the correct moments while eliminating the need for continuous monitoring or external control signals that would increase power consumption.
Data Source
AI summary
Techniques are disclosed for analog-to-digital conversion systems and methods with pulse generators. In one example, an imaging system includes an analog-to-digital converter (ADC). The ADC includes a comparator configured to generate a comparator output signal based on a first signal and a second signal. The comparator output signal is associated with a first state or a second state. The ADC further includes a pulse generator coupled to the comparator. The pulse generator is configured to generate a pulse signal in response to a transition of the comparator output signal from the first state to the second state. The ADC further includes a memory device coupled to the pulse generator. The memory device is configured to capture a counter value from a counter circuit in response to the pulse signal. The counter value is associated with the detector signal. Related methods are also provided.