Pulse Voltage Generator for Nonvolatile Memory Threshold Stability
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Solution Overview
Problem
Existing nonvolatile memory technologies face issues with threshold changes after writing and erasing due to non-uniform electron trapping and injection of holes, leading to data loss and reduced read speed, requiring longer operating times and larger circuit sizes to apply low voltages.
Innovation Solution
A voltage generator system that includes a first voltage generator, a reference voltage generator, a comparator, and a booster to produce a pulse-like voltage waveform, ensuring uniform electron trapping during writing and uniform hole injection during erasing, thereby stabilizing the memory cell threshold.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional writing and erasing methods are used, then data can be stored and erased, but threshold changes occur after writing and erasing due to non-uniform electron trapping and hole injection
Solution Approach 1:
The patent applies periodic voltage variations during the writing process, using a booster circuit to generate pulse-like voltage waveforms that periodically modulate the drain voltage. This periodic action ensures uniform electron trapping throughout the dielectric film by creating alternating high and low field regions, preventing threshold drift over time.
Solution Approach 2:
The patent dynamically changes voltage parameters during writing and erasing operations. A voltage generator varies the drain voltage between different levels (e.g., 0V, 3.3V, 5V) depending on the operation phase, and the booster circuit adjusts voltage amplitude and timing to achieve uniform charge distribution, stabilizing the threshold voltage.
2Stability of the object's composition
If low voltage is applied to distribute electrons uniformly after writing, then threshold stability improves, but operating time increases
Solution Approach 1:
The patent performs electron distribution uniformization during the writing process itself rather than as a separate post-writing step. The booster circuit generates voltage pulses that simultaneously write data and distribute electrons uniformly, eliminating the need for additional low-voltage holding periods and reducing total operation time.
Solution Approach 2:
The patent maintains continuous voltage application during writing and erasing operations through the booster circuit, which generates sustained pulse-like waveforms. This continuous action with optimized timing ensures uniform charge distribution without interrupting the main operation, avoiding extended idle periods.
3Power
If conventional boost operation is used, then high voltage is generated for writing and erasing, but circuit size increases
Solution Approach 1:
The patent designs the booster circuit to perform multiple functions: generating high voltage for writing, generating high voltage for erasing, and controlling voltage timing and amplitude. This multi-functional approach consolidates what would otherwise require separate circuits, reducing overall circuit size while maintaining full voltage generation capability.
Solution Approach 2:
The patent combines the voltage generation, timing control, and waveform shaping functions into a single integrated booster circuit. The booster merges the functions of voltage multiplication, pulse generation, and amplitude modulation that would traditionally require separate components, thereby reducing circuit complexity and area.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution prevents dropout of held electrons and reduces threshold variations, minimizing the time required for writing and erasing operations while reducing circuit size by enabling uniform electron and hole distribution within the dielectric film.
Implementation Method 1
a booster 12 to generate the applied voltage in a pulse-like voltage waveform by starting or stopping boost operation
Implementation Method 2
a comparator 9 to compare the first voltage with a reference voltage Va and output a boost operation control signal according to a comparison result
Implementation Method 3
hot electrons which are accelerated in a depletion layer that is formed in the vicinity of the drain are generated. The hot electrons are injected from the vicinity of the drain into the gate side, so that the hot electrons are trapped in the nitride film 61
Implementation Method 4
the P-type electrons in the substrate 65 to pass through the depletion layer surrounding the drain electrode 62 and move to the N-type conduction band of the drain electrode 62
Data Source
AI summary
A voltage generator for nonvolatile memory that generates an applied voltage to be applied to a nonvolatile memory includes a first voltage generator to generate a first voltage corresponding to the applied voltage, a reference voltage generator to generate a reference voltage, a comparator to compare the first voltage with the reference voltage and output a boost operation control signal according to a comparison result, and a booster to generate the applied voltage in a pulse-like voltage waveform by starting or stopping boost operation based on the boost operation control signal. The applied voltage corresponding to the first voltage upon inversion of the boost operation control signal is varied within one pulse-like voltage waveform by varying one of the first voltage and the reference voltage.