Variable Pulse Width Generator With Low-Power Duty Cycle Control
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Solution Overview
Problem
Existing signal generator circuits require fast comparators and high-frequency components, leading to energy inefficiency and complex duty cycle adjustments, which are costly and error-prone.
Innovation Solution
A pulse-width modulated signal generator circuit with a D flip-flop and regulation loop that adjusts the duty cycle by modifying the setpoint signal, eliminating the need for high-frequency components and allowing simple, low-power operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If high-frequency components and fast comparators are used to generate precise pulse width signals, then the output signal precision is improved, but the energy consumption increases
Solution Approach 1:
The patent changes the operating parameters by using a low-frequency clock signal instead of high-frequency components. The duty cycle is controlled by adjusting the voltage level of a DC input signal rather than using high-frequency switching, thereby reducing energy consumption while maintaining output signal precision.
2Manufacturing precision
If high-frequency synchronous counters and digital comparators are used to achieve variable duty cycle, then the duty cycle adjustment precision is improved, but the device complexity increases
Solution Approach 1:
The patent extracts and removes the complex high-frequency synchronous counter and digital comparator components from the system. Instead, it uses a simple analog comparator that compares a triangular signal with a DC input signal to generate the desired pulse width modulation, significantly reducing device complexity while maintaining duty cycle adjustment precision.
Solution Approach 2:
The patent substitutes the digital/mechanical counting and comparison system with an analog signal processing approach. The triangular signal and DC input signal are continuously compared in the analog domain, replacing the need for digital counters and comparators, thereby simplifying the overall device structure.
3Reliability
If fast switching components are used to ensure rapid comparator response, then the output signal reliability is improved, but the manufacturing cost increases
Solution Approach 1:
The patent employs standard, inexpensive analog comparator components rather than expensive fast-switching components. The low-frequency operation allows the use of conventional analog devices that are cheaper and easier to manufacture, while the continuous analog comparison ensures reliable output signal generation without requiring rapid switching capabilities.
Data Source
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Figure 3
AI summary
The present invention relates to a signal generator circuit (1) supplied with a supply voltage and comprising toggling means (2) that comprises a first input to which a DC input signal (E1) having a defined amplitude is connected, a second input (Sclk) to which a clock signal having a defined duty cycle is connected, and a third input for resetting to zero, and providing, at the output, an output signal (S1, Sout) having the same duty cycle as the clock signal and the same amplitude as the input signal. The invention is characterized in that said circuit furthermore comprises regulating means (3) designed to compare the output signal to a reference signal (E3) representative of the desired duty cycle and to provide a control signal (S4) connected to the third input of the toggling means so as to activate the reset to zero in order to modify the duty cycle of the output signal.