Pulsed MOSFET Gate Control for Inrush Current and Thermal Stress

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Solution Overview

Problem

Hot-swappable components and e-fuse controllers face challenges in managing inrush currents, leading to transistor failure due to excessive current and thermal issues, as traditional power MOSFETs are often oversized and prone to failure under high inrush currents and thermal stress.

Innovation Solution

A pulsed gate control technique is employed to regulate the current through a transistor by pulsing the gate on and off, allowing for higher safe operating currents for short periods while cooling the transistor between pulses, thereby preventing overheating and damage, using a feedback controller to adjust the voltage based on measured drain source voltage and current levels.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a series element (power MOSFET) is used to control inrush current, then current flow is controlled during startup, but the transistor fails due to excessive current and thermal stress

Engineering Contradiction:
Improvetransistor reliabilityVSAvoidinrush current damage
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent applies periodic action by implementing a two-stage pulsed gate control scheme that periodically switches the MOSFET between on and off states. During the first stage, high-current pulses are permitted for a limited duration to charge the output capacitor, followed by a second stage with reduced current pulses. This periodic switching allows the transistor to handle inrush currents in controlled bursts while preventing thermal accumulation and damage, directly resolving the contradiction between current control capability and transistor reliability.

Inventive Principle:
Principle #19Periodic action

2Power

If power MOSFETs are oversized to handle very large inrush currents, then current handling capability is improved, but the devices are prone to failure due to thermal limits and inrush currents exceeding maximum handling capacity

Engineering Contradiction:
Improvecurrent handling capabilityVSAvoiddevice failure rate
Core Design Contradiction:
PowerVSReliability

Solution Approach 1:

The patent implements dynamics by transitioning from a static, continuous current limitation approach to a dynamic, time-varying pulsed control scheme. The gate control circuit dynamically adjusts the MOSFET's current handling capability by applying voltage pulses that allow high current only during specific time windows when the output capacitor voltage is still rising. This dynamic approach enables the use of smaller, more reliable MOSFETs that can handle peak inrush currents during brief pulses without exceeding their thermal limits, resolving the contradiction between power capability and reliability.

Inventive Principle:
Principle #15Dynamics

3Temperature

If continuous current is limited to safe operating levels, then thermal stress is reduced, but the charging time for large capacitance increases significantly

Engineering Contradiction:
Improvethermal stressVSAvoidcharging time
Core Design Contradiction:
TemperatureVSLoss of time

Solution Approach 1:

The patent resolves this contradiction by applying periodic action through a two-stage pulsed gate control mechanism. In the first stage, the MOSFET is switched on with high-current pulses for a predetermined time period, allowing rapid charging of the output capacitor while the transistor remains within safe operating temperature limits due to the pulsed nature of the current. After the first stage, a second stage begins with reduced current pulses to complete the charging. This periodic approach enables both fast charging and thermal management, simultaneously achieving reduced thermal stress and minimized charging time.

Inventive Principle:
Principle #19Periodic action

4Productivity

If the transistor is allowed to operate at higher currents for short periods, then charging speed is improved, but the risk of exceeding safe operating area increases

Engineering Contradiction:
Improvecharging speedVSAvoidsafe operating area compliance
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent implements feedback by using the output capacitor voltage as a feedback signal to control the gate voltage pulses. As the output capacitor charges and its voltage rises, the feedback mechanism automatically reduces the amplitude and duration of the gate voltage pulses, thereby limiting the drain current to appropriate levels at each charging stage. This feedback control ensures that the transistor operates within its safe operating area throughout the charging process while still allowing high-current pulses during the initial fast-charging phase, resolving the contradiction between charging speed and safe operating area compliance.

Inventive Principle:
Principle #23Feedback

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method effectively manages inrush currents and prevents transistor damage by maintaining current within safe operating limits, allowing for higher current capabilities during short pulses and reducing thermal stress, thus enhancing the reliability of hot-swappable components and e-fuse controllers.

Implementation Method 1

a transistor (e.g., an N-channel MOSFET) having a drain terminal, a source terminal, and a gate terminal

Methodology Applied
Scientific EffectField Effect Transistor operation: Electric Field

Implementation Method 2

adjusting, for each of a first sequence of current pulses, a voltage of a voltage pulse applied to a control node of the transistor using a feedback controller until the current measured through the transistor is not greater than a first function of the safe operating current

Methodology Applied
Scientific EffectElectrical measurement and feedback control: Feedback

Data Source

PatentUS11870428B1System and method for pulsed gate control of a transistor
Publication Date: 2024.01.09 INFINEON TECH AUSTRIA AG
  • US11870428B1 patent drawing
  • US11870428B1 patent drawing
  • US11870428B1 patent drawing

AI summary

A method of controlling current through a transistor is provided. A voltage and current through the transistor are measured. A safe operating current for the voltage is determined. For each of a first sequence of current pulses, a voltage of a voltage pulse applied to a control node of the transistor using a feedback controller is adjusted until the current measured through the transistor is not greater than a first function of the safe operating current. For each of a second sequence of current pulses after the first sequence of current pulses, the voltage of the voltage pulse applied to the control node of the transistor using the feedback controller is adjusted until the current measured through the transistor is not greater than a second function of the safe operating current.