Multi-Level Pulser Circuit Using Clamping Branch Transition Drive
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Solution Overview
Problem
Conventional multi-level pulsers struggle with rapidly driving the output node from a positive voltage level to a lower positive voltage and from a negative voltage level to a higher negative voltage, resulting in limited output load driving capability, especially during falling transitions between positive voltage levels and rising transitions between negative voltage levels.
Innovation Solution
A multi-level pulser circuit with control circuitry that selectively couples the output pin to input pins and a reference input pin during specific transitions, allowing for bidirectional current capability without additional MOS transistors, by simultaneously activating the clamping half-bridge branch during transitions and controlling it based on current sensing or time periods to enhance output load driving.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If a conventional multi-level pulser is used, then the circuit structure is simple, but the output load driving capability is limited during falling transitions between positive voltage levels and rising transitions between negative voltage levels
Solution Approach 1:
The patent merges the clamping half-bridge branch with the existing half-bridge branches to form a unified multi-level pulser circuit. This integration allows the clamping branch to participate in voltage transitions, enabling rapid discharge of the output load during falling transitions between positive voltage levels and rising transitions between negative voltage levels, thereby improving output load driving capability without adding completely separate circuit structures
Solution Approach 2:
The clamping half-bridge branch, traditionally used only for clamping, is made multi-functional by enabling it to assist in voltage transitions. The control circuitry configures the clamping branch to actively participate in discharge operations during specific transition types, allowing a single circuit element to serve multiple functions: clamping, discharge assistance during falling transitions, and discharge assistance during rising transitions, thus improving overall circuit versatility without proportionally increasing complexity
2Ease of operation
If additional MOS transistors are added to achieve bidirectional current capability, then the output load driving capability is improved, but the design complexity and cost increase
Solution Approach 1:
The existing clamping half-bridge branch, which is already present in the circuit, is made to serve the additional function of assisting in voltage transitions. By reconfiguring the control circuitry to activate the clamping branch during specific transition types, the circuit uses its existing resources to achieve bidirectional current capability without requiring additional MOS transistors, thus avoiding increased design complexity and cost
Solution Approach 2:
The patent changes the operational parameters and configuration of the clamping half-bridge branch based on the type of voltage transition detected. The control circuitry dynamically reconfigures which half-bridge branches are active during different transition types, allowing the same physical circuit elements to exhibit different functional behaviors. This parameter-based control enables bidirectional current capability without adding hardware complexity
Data Source
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AI summary
A multi-level pulser circuit (8) comprises a set of first input pins (HVPO, HVP1) for receiving respective positive voltage signals (HVP0, HVP1) at different voltage levels, a set of second input pins (HVNO, HVN1) for receiving respective negative voltage signals (HVN0, HVN1) at different voltage levels, and a reference input pin (GND) configured to receive a reference voltage signal (GND) intermediate said positive voltage signals (HVP0, HVP1) and said negative voltage signals (HVN0, HVN1). The circuit comprises an output pin (OUT) configured to supply a pulsed output signal (OUT). The circuit further comprises control circuitry configured to selectively (P0, P1, N0, N1, CL) couple said output pin (OUT) to one of said first input pins (HVPO, HVP1), said second input pins (HVNO, HVN1) and said reference input pin (GND) to generate said pulsed output signal (OUT) at said output pin (OUT). The control circuitry is further configured to couple said output pin (OUT) to at least one pin selected in the group comprising said second input pins (HVNO, HVN1) and said reference input pin (GND) during falling transitions of said pulsed output signal (OUT) between two positive voltage levels, and couple said output pin (OUT) to at least one pin selected in the group comprising said first input pins (HVPO, HVP1) and said reference input pin (GND) during rising transitions of said pulsed output signal (OUT) between two negative voltage levels.