In-Situ Doped Punch-Through Stopper Layer for FinFET Junction Control
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Solution Overview
Problem
In FINFET devices, particularly for P-type SiGe fins, punch-through stopper implantation can lead to diffusion issues such as Vt shift, random dopant fluctuation, and low mobility due to phosphorous or arsenic creeping into the channel region, complicating device performance and integration at small dimensions.
Innovation Solution
Employing a highly P-doped silicon epitaxial growth and an undoped silicon buffer layer below the SiGe channel, instead of traditional implantation, to control the diffusion of the punch-through stopper material and form semiconductor fins with precise junction control.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If traditional punch-through stopper implantation is used, then junction control is achieved, but dopant diffusion into the channel region causes Vt shift and mobility degradation
Solution Approach 1:
An undoped semiconductor buffer layer is introduced as an intermediary between the punch-through stopper layer and the channel region. This buffer layer acts as a barrier that prevents dopant diffusion from the stopper layer into the channel, thereby eliminating Vt shift and mobility degradation while maintaining effective junction control through the stopper layer.
Solution Approach 2:
The semiconductor structure is segmented into distinct functional layers: the punch-through stopper layer for junction control, the undoped buffer layer for dopant isolation, and the channel region for carrier transport. This segmentation allows each layer to perform its specific function without interfering with others, resolving the contradiction between junction control and device performance.
2Manufacturing precision
If phosphorous or arsenic is implanted for punch-through stopper, then stopper function is achieved, but random dopant fluctuation occurs
Solution Approach 1:
The undoped buffer layer serves as an intermediary that physically separates the implanted dopants in the stopper layer from the channel region. This isolation prevents random dopant fluctuation in the channel while maintaining the stopper's ability to control junction depth and prevent punch-through.
3Manufacturing precision
If implantation method is used for punch-through stopper, then dopant distribution is controlled, but diffusion into channel region degrades mobility
Solution Approach 1:
The undoped buffer layer acts as a diffusion barrier that prevents dopant atoms from the implanted stopper layer from migrating into the channel region. This maintains precise dopant distribution control in the stopper layer while protecting channel mobility from degradation by blocking dopant diffusion paths.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces dopant creep and diffusion into the channel region, enhancing control over junctions and improving device performance by maintaining precise dopant distribution and mobility, especially in next-generation FINFETs with small dimensions.
Implementation Method 1
forming an in-situ doped, punch-through stopper layer above the second semiconductor region comprising the first semiconductor material and a first dopant
Implementation Method 2
forming a semiconductor buffer layer above the punch-through stopper layer, where the punch-through stopper layer includes the first semiconductor material
Data Source
AI summary
A method for making a semiconductor device may include forming first and second semiconductor regions laterally adjacent one another and each comprising a first semiconductor material. The method may further include forming an in-situ doped, punch-through stopper layer above the second semiconductor region comprising the first semiconductor material and a first dopant, and forming a semiconductor buffer layer above the punch-through stopper layer, where the punch-through stopper layer includes the first semiconductor material. The method may also include forming a third semiconductor region above the semiconductor buffer layer, where the third semiconductor region includes a second semiconductor material different than the first semiconductor material. In addition, at least one first fin may be formed from the first semiconductor region, and at least one second fin may be formed from the second semiconductor region, the punch-through stopper layer, the semiconductor buffer layer, and the third semiconductor region.