Pure-Hardware Buffer Block Management for Concurrent Data Access

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Solution Overview

Problem

Conventional buffer management in network devices relies on software, which consumes processor resources and introduces inefficiencies, especially in scenarios with concurrent access and varying quality of service requirements.

Innovation Solution

A buffer management apparatus and method using pure hardware to manage buffer blocks, employing a buffer block management circuit and registers to communicate with software, allowing data access without processor intervention.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If software is used to manage buffer blocks, then buffer management functionality is achieved, but processor resources are consumed and concurrent access efficiency deteriorates

Engineering Contradiction:

Improvebuffer management functionalityVSAvoidconcurrent access efficiency

Core Design Contradiction:

Ease of operationVSProductivity

Solution Approach 1:

The patent replaces the software-based buffer management system with a hardware-based buffer block management circuit. This circuit includes a buffer block record table stored in a first storage medium and a buffer block management unit that communicates with software through registers. The hardware circuit performs buffer block allocation, release, and initialization operations directly, eliminating the need for software intervention and processor resources, thereby significantly improving concurrent access efficiency while maintaining buffer management functionality.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

2Reliability

If software with lock mechanism is used for concurrent access, then protection is provided, but processor resources are heavily consumed

Engineering Contradiction:

Improveconcurrent access protectionVSAvoidprocessor resource consumption

Core Design Contradiction:

ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent replaces the software-based lock mechanism with a hardware-based buffer block management circuit that inherently provides concurrent access protection. The circuit includes a buffer block record table and management unit that operate in hardware, eliminating the need for software locks and associated processor resources. The hardware circuit ensures reliable concurrent access through its structural design while consuming minimal processor resources.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

3Ease of operation

If software is used for buffer allocation and release, then buffer management is achieved, but processor resources are occupied

Engineering Contradiction:

Improvebuffer management capabilityVSAvoidprocessor resource occupation

Core Design Contradiction:

Ease of operationVSDevice complexity

Solution Approach 1:

The patent replaces software-based buffer allocation and release operations with a hardware-based buffer block management circuit. The circuit includes a buffer block record table stored in a first storage medium and a management unit that communicates with software through registers. This hardware implementation performs all buffer management operations (allocation, release, initialization) directly in hardware, maintaining ease of operation through software interface while eliminating processor resource occupation.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS12386548B2Buffer management apparatus that uses pure hardware to manage buffer blocks configured in storage medium and associated buffer management method

Publication Date: 2025.08.12 AIROHA TECH (SUZHOU) LTD

AI summary

A buffer management apparatus includes a plurality of registers and a buffer block management circuit. The buffer block management circuit is used to communicate with software through the plurality of registers, and utilize pure hardware to manage a plurality of buffer blocks configured in a storage medium, for allowing the software to perform data access upon the plurality of buffer blocks.