Push-Pull Input Buffer Shielding for Bandwidth and Return Loss
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Solution Overview
Problem
Integrated circuit ADCs face challenges in maintaining high bandwidth and return loss due to parasitic capacitances, which degrade performance especially at high frequencies and across varying process, voltage, and temperature conditions.
Innovation Solution
The implementation of a source follower connected in series with a push-pull driver to generate a shield reference node, with conductive traces between the gate traces and a reference potential node, capacitively coupling the transistors to shield parasitic capacitances and reduce effective input capacitance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If parasitic capacitances are present in the input buffer, then the circuit structure is simple, but the bandwidth and high frequency return loss performance deteriorate
Solution Approach 1:
A shield reference node is introduced as an intermediary element between the push-pull driver output and the gate traces. This shield node acts as a mediator that blocks the harmful capacitive coupling between the output node and input gates, thereby improving bandwidth without requiring complete circuit redesign
Solution Approach 2:
The input buffer circuit is segmented into distinct functional regions: the push-pull driver stage, the shield reference node region, and the gate trace region. By segmenting the circuit, the parasitic capacitance paths are isolated and controlled, allowing bandwidth improvement while maintaining manageable circuit complexity
2Reliability
If parasitic capacitances are present, then the circuit implementation is straightforward, but the high frequency return loss performance worsens
Solution Approach 1:
The shield reference node serves as an intermediary that improves high frequency return loss by preventing direct capacitive coupling between the output node and input signals. This mediator blocks reflected signals and improves impedance matching at high frequencies without requiring complex matching networks
Solution Approach 2:
The shield reference node is maintained at a fixed reference potential (typically ground or bias voltage), creating an equipotential region that prevents voltage fluctuations and signal reflections. This equipotential shielding improves return loss by providing a stable reference that minimizes impedance variations across frequency
3Stability of the object's composition
If conventional buffer architecture is used, then the power consumption is low, but the input amplitude attenuation varies across PVT conditions
Solution Approach 1:
The shield reference node acts as an intermediary that stabilizes the electrical environment for the input gates across PVT variations. By blocking parasitic capacitance coupling, it ensures consistent signal transmission characteristics regardless of process, voltage, or temperature changes
Solution Approach 2:
The invention changes the electrical parameters of the buffer by introducing the shield node, which modifies the capacitance landscape. This parameter change (reducing effective parasitic capacitance) stabilizes the input amplitude across PVT conditions without requiring adaptive circuitry that would increase complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration improves the input and output bandwidth of the input buffer without additional power consumption, enhances high-frequency return loss, and stabilizes input amplitude across PVT variations.
Implementation Method 1
conductive traces extending from the shield reference node and disposed between gate traces of the input buffer and a corresponding nearest reference potential node
Implementation Method 2
capacitively coupling, via the gate traces, to receive an input signal from an input node
Data Source
AI summary
Apparatus and associated methods relate to an input buffer having a source follower connected in series with a push-pull driver to generate a shield reference node that provides conductive traces extending from the shield reference node and disposed between gate traces of the input buffer and a corresponding nearest reference potential node. In an illustrative example, the push-pull driver and the source follower may be capacitively coupled, via the gate traces, to receive an input signal from an input node. In some examples, the shield reference node may also include conductive traces disposed between the input node and/or the gate traces and a corresponding nearest reference potential node such that parts of parasitic capacitances in the input buffer may be shielded. Accordingly, the bandwidth of the input buffer may be advantageously improved. The high frequency return loss (S11) may also be improved accordingly.