Push-Pull LNA Layout Using Concentric Degeneration Inductors
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Solution Overview
Problem
Conventional low-noise amplifiers (LNAs) in communication devices lack efficiency and consume high power due to the absence of a push-pull configuration, which is typically used in output amplifiers, resulting in lower efficiency and higher power consumption in input amplifiers.
Innovation Solution
The integration of a push-pull configuration in LNAs, utilizing concentric loops of wire to form degeneration inductances, reduces power consumption and increases efficiency while maintaining linearity and noise levels, and implementing area-efficient inductor layouts by coupling input lines to the inductors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If a push-pull configuration is implemented in LNAs, then power consumption is reduced and efficiency is improved, but device complexity increases due to additional circuit components
Solution Approach 1:
The patent combines the push and pull stages into a single integrated circuit block with shared components. The concentric loop inductors serve dual purposes as both inductive elements and structural frameworks, while the differential pair transistors handle both push and pull functions through their complementary operation, reducing overall component count despite the push-pull architecture
Solution Approach 2:
The patent employs nested concentric loops where one loop is placed inside another, with both loops forming degeneration inductances. This nesting arrangement allows multiple inductive functions to be achieved within a compact spatial footprint, reducing the area occupied by inductors while maintaining the push-pull configuration's efficiency benefits
2Reliability
If conventional separate loop layouts are used for inductors, then inductance values are achieved, but occupied area is excessive
Solution Approach 1:
The patent implements nested concentric loops where an inner loop is positioned within the boundaries of an outer loop. Both loops are electrically isolated but spatially nested, allowing the circuit to achieve the required inductance values through the combined magnetic fields of both loops while occupying significantly less chip area than separate non-nested loops would require
Solution Approach 2:
The patent transitions from planar side-by-side loop arrangements to a vertically stacked concentric configuration. By utilizing the radial dimension and creating loops at different radii from a common center point, the design achieves three-dimensional space utilization in a two-dimensional plane, reducing the lateral footprint of the inductor structure
3Productivity
If push-pull configuration is used, then efficiency is improved, but linearity and noise performance may deteriorate
Solution Approach 1:
The patent applies different quality characteristics to different parts of the push-pull circuit. The concentric loop inductors provide high Q-factor inductive reactance for efficiency, while the degeneration configuration introduces controlled resistive elements that improve linearity. The differential pair transistors are biased and dimensioned to optimize noise performance while maintaining the push-pull efficiency advantage
Solution Approach 2:
The degeneration inductors formed by the concentric loops provide inherent feedback mechanisms that linearize the amplifier operation. The reactive degeneration introduces negative feedback that reduces distortion and improves linearity, while the differential configuration provides noise cancellation through common-mode rejection, maintaining reliability alongside improved efficiency
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The push-pull configuration reduces power consumption by half, achieves high efficiency, and maintains linearity and noise levels, while the area-efficient implementation minimizes the occupied area in integrated circuits.
Implementation Method 1
A first loop of wire is configured to form a first degeneration inductance of the push stage. A second loop of wire is configured to form a first degeneration inductance of the pull stage.
Data Source
AI summary
An amplifier integrated circuit (IC) including a push-pull amplifier having a push stage and a pull stage. A first loop of wire configured to form a first degeneration inductance of the push stage. A second loop of wire configured to form a first degeneration inductance of the pull stage. The first loop and the second loop are concentric. The first loop is connected to a reference potential. The second loop is connected to a supply voltage.