Push-Pull Memory Programming With Soft Erase Charge Control

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Solution Overview

Problem

Existing memory cell programming techniques suffer from charge loss issues, leading to widened threshold voltage distributions and reduced read window budget due to charge loss mechanisms such as single bit charge loss, intrinsic charge loss, and quick charge loss, which are not effectively managed by current methods.

Innovation Solution

Implementing a push-pull programming operation with a soft erase sub-operation between programming pulses and program verify operations to accelerate charge loss, using a lower erase voltage to manage and identify charge loss during the programming cycle.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional programming techniques are used, then programming operation can be completed, but charge loss occurs leading to widened threshold voltage distributions and reduced read window budget

Engineering Contradiction:

Improveread window budgetVSAvoidcharge loss

Core Design Contradiction:

ReliabilityVSLoss of energy

Solution Approach 1:

The patent applies a preliminary soft erase operation before the main programming operation to pre-condition the memory cells. This preliminary action accelerates charge loss mechanisms in advance, allowing the main programming operation to work with more stable charge characteristics, thereby improving read window budget while reducing the impact of charge loss during programming.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent converts the harmful charge loss phenomenon into a beneficial effect by intentionally accelerating charge loss through controlled soft erase operations. By harnessing the charge loss mechanism rather than merely preventing it, the patent achieves tighter threshold voltage distributions and improved read window budget, turning a detrimental effect into a useful tool for better programming control.

Inventive Principle:

Principle #22Blessing in disguise (Convert harm into benefit)

2Manufacturing precision

If programming pulses are applied to program memory cells, then data can be written, but charge loss mechanisms cause widened threshold voltage distributions

Engineering Contradiction:

Improvethreshold voltage distributionVSAvoidcharge loss

Core Design Contradiction:

Manufacturing precisionVSLoss of energy

Solution Approach 1:

The patent performs a soft erase operation as a preliminary step before applying programming pulses. This preliminary action accelerates charge loss and stabilizes the charge characteristics of memory cells, ensuring that subsequent programming pulses produce tighter threshold voltage distributions and more precise manufacturing outcomes.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent transforms the charge loss mechanism, which normally degrades threshold voltage distribution precision, into a beneficial effect. By using controlled soft erase operations to accelerate charge loss in a predictable manner, the patent achieves tighter threshold voltage distributions and improved programming precision, converting a harmful effect into a precise control mechanism.

Inventive Principle:

Principle #22Blessing in disguise (Convert harm into benefit)

3Productivity

If standard programming operations are performed, then memory cells can be programmed, but programming time is extended due to charge loss management requirements

Engineering Contradiction:

Improveprogramming speedVSAvoidprogramming time

Core Design Contradiction:

ProductivityVSLoss of time

Solution Approach 1:

The patent implements a soft erase operation as a preliminary step that accelerates charge loss before the main programming operation. By pre-conditioning the memory cells to have more stable charge characteristics, the main programming operation requires fewer iterations and less time, thereby improving overall programming speed despite the added preliminary step.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent converts the time-consuming charge loss management requirement into a productivity enhancement. By intentionally accelerating charge loss through soft erase operations, the patent reduces the number of programming iterations needed and shortens the overall programming time, turning a potential time loss into a time-saving mechanism.

Inventive Principle:

Principle #22Blessing in disguise (Convert harm into benefit)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The push-pull programming operation improves read window budget and reduces programming time by effectively managing charge loss, resulting in more accurate program verification and improved memory device performance.

Implementation Method 1

accelerate charge loss, using a lower erase voltage to manage and identify charge loss during the programming cycle

Methodology Applied

Scientific EffectCharge loss acceleration:

Data Source

PatentUS12431198B2Charge loss acceleration during programming of memory cells in a memory sub-system

Publication Date: 2025.09.30 MICRON TECHNOLOGY INC

AI summary

Control logic in a memory device causes a programming pulse of a set of programming pulses associated with a programming algorithm to be applied to a selected wordline associated with a set of memory cells to be programmed to a target voltage level representing a programming level. Voltage levels of the selected wordline and one or more unselected wordlines of the memory array are discharged to approximately a ground voltage level and a bitline voltage level is applied to a bitline corresponding to the programming level. The selected wordline and a set of unselected wordlines are charged to approximately a pass voltage level followed by the discharge of the selected wordline to a reverse bias level to establish an erase voltage level on the set of memory cells. The control logic further performs a program verify operation corresponding to the programming level associated with the set of memory cells.