PVD Chuck Biasing for Void-Free Aluminum Copper Interconnects
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In the back-end of line (BEOL) process for integrated circuit fabrication, physical vapor deposition (PVD) chambers fail to bias power to the chuck that heats the semiconductor device, leading to voids or pinholes in the aluminum copper layer, which prevents the second insulation layer from fully covering the aluminum copper layer and damages it when the bumping chemical layer contacts it.
Innovation Solution
A PVD chamber with a biased power supply for the chuck component is used to support and heat the semiconductor device, along with a magnetron to generate a magnetic field that ensures the aluminum copper layer fills the insulation layer vias without voids, improving the layer's performance and preventing damage from the bumping chemical layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a PVD chamber deposits an aluminum copper layer on a semiconductor device without biasing power to the chuck, then the deposition process is simpler and energy consumption is lower, but voids or pinholes are formed in the aluminum copper layer
Solution Approach 1:
The patent applies parameter changes by introducing a biased power supply to the chuck component, changing the electrical parameter from zero bias to a specific biased state. This parameter change enables the aluminum copper layer to deposit uniformly without voids or pinholes, resolving the quality issue while adding only a single power supply component to the PVD chamber.
2Productivity
If the aluminum copper layer contains voids or pinholes, then the deposition process is faster and more efficient, but the second insulation layer cannot fully cover the aluminum copper layer and gets damaged
Solution Approach 1:
The patent applies preliminary action by biasing the chuck before the aluminum copper layer deposition begins. This preliminary electrical conditioning of the substrate creates optimal surface conditions that enable uniform layer formation from the start, preventing voids and pinholes before they can form, thus ensuring both deposition efficiency and layer integrity.
3Manufacturing precision
If bias power is provided to the chuck during aluminum copper layer deposition, then the aluminum copper layer is void-free and uniform, but the energy consumption and process complexity increase
Solution Approach 1:
The patent optimizes the energy parameter by applying a specific biased power level to the chuck that is sufficient to achieve uniform aluminum copper layer deposition without excessive energy consumption. This controlled parameter change balances manufacturing precision requirements with energy efficiency, adding minimal power consumption to achieve significant quality improvement.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution prevents voids in the aluminum copper layer, allowing the second insulation layer to completely cover it, thereby avoiding damage from the bumping chemical layer and enhancing the semiconductor device's performance by ensuring a more uniform and gap-filled aluminum copper layer.
Implementation Method 1
physical vapor deposition (PVD) chambers
Implementation Method 2
a magnetron to generate a magnetic field that ensures the aluminum copper layer fills the insulation layer vias without voids
Implementation Method 3
a chuck component to support the semiconductor device and to provide heat to the semiconductor device
Data Source
AI summary
An apparatus for manufacturing a semiconductor device may include a chamber, a chuck provided in the chamber, and a biased power supply physically connected with the chuck. The apparatus may include a target component provided over the chuck and the biased power supply, and a magnetron assembly provided over the target component. The magnetron assembly may include a plurality of outer magnetrons and a plurality of inner magnetrons, and a spacing between each adjacent magnetrons of the plurality of outer magnetrons may be different from a spacing between each adjacent magnetrons of the plurality of inner magnetrons.


