PVD Pulsed-Bias Etching for Better Step Coverage
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Physical vapor deposition (PVD) processes cause damage to substrate layers, particularly when high-energy ions are used, leading to poor step coverage and defects in high aspect ratio features, which compromise device performance and reliability.
Innovation Solution
A method using pulsed voltage waveforms is applied during PVD to control plasma interaction with the substrate, including biasing a target within the chamber and etching portions of the deposited layer, thereby improving step coverage and damage control.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If high-energy ions are used to enhance deposition rate in PVD process, then deposition efficiency is improved, but substrate damage increases leading to poor step coverage
Solution Approach 1:
The patent applies pulsed voltage waveforms to the substrate electrode, creating periodic cycles of high and low ion energy. During the high-voltage phase, ion bombardment enhances deposition rate, while during the low-voltage phase, ion energy is reduced to minimize damage. This periodic modulation allows the system to achieve high deposition rates without the continuous substrate damage that would otherwise occur, thereby improving step coverage in high aspect ratio features.
2Productivity
If high-energy ions are used to enhance deposition rate, then deposition efficiency is improved, but substrate damage increases leading to defects
Solution Approach 1:
By using pulsed voltage waveforms, the system periodically reduces ion energy to minimal levels during specific phases of the pulse cycle. This periodic low-energy state prevents cumulative substrate damage and defect formation that would otherwise occur during continuous high-energy deposition, thereby maintaining device reliability while preserving high deposition rates during the active phases.
3Manufacturing precision
If pulsed voltage waveforms are applied to control plasma interaction, then substrate damage is reduced, but process complexity increases
Solution Approach 1:
The patent modifies the electrical parameters of the PVD process by applying pulsed voltage waveforms with specific characteristics (frequency, amplitude, duty cycle) to the substrate electrode. This parameter change transforms the continuous plasma interaction into a controlled periodic interaction, enabling improved step coverage through reduced ion damage while using standard PVD equipment with modified power supply capabilities.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method reduces substrate damage and enhances film deposition quality by minimizing ion energy, resulting in improved step coverage and reduced defects in high aspect ratio features.
Implementation Method 1
applying a substrate bias to an electrode disposed within a substrate support near a substrate receiving surface, wherein applying the substrate bias comprises delivering a pulsed-voltage (PV) waveform to the electrode
Implementation Method 2
forming, within a physical vapor deposition chamber, a first layer by use of a physical vapor deposition process on a surface of substrate
Implementation Method 3
forming the first layer comprises biasing a target within the process chamber
Implementation Method 4
etching, within the physical vapor deposition chamber, at least a portion of the first layer. The etching process comprises: applying a substrate bias to an electrode disposed within a substrate support near a substrate receiving surface
Data Source
AI summary
Embodiments of the disclosure include a method for fabricating a semiconductor device, comprising: forming, within a physical vapor deposition (PVD) chamber, a first layer by use of a PVD process on a surface of substrate that comprises a plurality of features formed therein, wherein forming the first layer comprises biasing a target within the process chamber; and etching, within the PVD chamber, at least a portion of the first layer. The etching process comprises: applying a substrate bias to an electrode disposed within a substrate support near a substrate receiving surface, wherein applying the substrate bias comprises delivering a pulsed-voltage (PV) waveform to the electrode; and exposing the substrate to a plasma generated within the PVD chamber.