PWB Modular Vertical Interconnects for Fan-Out Packaging
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Solution Overview
Problem
Current semiconductor device manufacturing processes, particularly in 3D packaging technologies like Fo-WLCSP, face challenges with high equipment costs, reduced manufacturing throughput, and yield loss due to the need for laser drilling and contamination risks associated with conductive materials used for vertical interconnections.
Innovation Solution
The implementation of PWB modular vertical interconnect units that eliminate the need for laser drilling by using a method involving semiconductor die, modular interconnect units, encapsulants, insulating layers, and conductive layers to form vertical interconnects without drilling through the package, thereby reducing contamination risks and improving manufacturing efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If laser drilling is used to form vertical interconnect structures, then interconnection is achieved, but equipment cost increases and manufacturing throughput decreases
Solution Approach 1:
The patent replaces the mechanical laser drilling process with a chemical etching process to form vertical interconnect structures. Instead of using laser energy to drill through the package, the invention uses chemical solutions to selectively remove material and create conductive pathways, thereby eliminating the need for expensive laser equipment and improving manufacturing throughput.
Solution Approach 2:
The invention changes the fundamental parameter of interconnect formation from mechanical removal (laser drilling) to chemical removal (etching). This parameter change allows for lower equipment costs and higher productivity while maintaining the reliability of vertical interconnections in the 3D Fo-WLCSP package.
2Reliability
If laser drilling is used to form vertical interconnect structures, then interconnection is achieved, but manufacturing cost increases
Solution Approach 1:
The patent replaces the mechanical laser drilling process with a chemical etching process to form vertical interconnect structures. Instead of using laser energy to drill through the package, the invention uses chemical solutions to selectively remove material and create conductive pathways, thereby eliminating the need for expensive laser equipment and improving manufacturing throughput.
Solution Approach 2:
The invention uses disposable chemical etchants and sacrificial materials that can be easily replaced and disposed of, rather than relying on expensive, durable laser drilling equipment. This approach reduces capital equipment costs and allows for simpler, more cost-effective manufacturing processes.
3Reliability
If conductive materials are used for vertical interconnects, then electrical connection is achieved, but contamination of semiconductor die occurs
Solution Approach 1:
The patent extracts or removes the harmful conductive materials from the semiconductor die surface after vertical interconnect formation. By selectively removing excess conductive material and sacrificial layers, the invention prevents contamination of the die while maintaining the necessary electrical connections through the vertical interconnect structures.
Solution Approach 2:
The invention uses sacrificial materials as intermediaries during the interconnect formation process. These temporary materials facilitate the creation of vertical pathways and electrical connections, then are selectively removed to prevent contamination. The sacrificial materials act as mediators that enable the process without causing harmful effects in the final product.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces manufacturing costs, enhances control over vertical interconnections, and minimizes contamination risks, leading to more efficient and cost-effective production of semiconductor devices with improved interconnect structures.
Implementation Method 1
depositing an encapsulant over the semiconductor die and modular interconnect unit
Implementation Method 2
depositing a conductive layer over the first insulating layer
Data Source
AI summary
A semiconductor device has a modular interconnect unit or interconnect structure disposed in a peripheral region of the semiconductor die. An encapsulant is deposited over the semiconductor die and interconnect structure. A first insulating layer is formed over the semiconductor die and interconnect structure. A plurality of openings is formed in the first insulating layer over the interconnect structure. The openings have a pitch of 40 micrometers. The openings include a circular shape, ring shape, cross shape, or lattice shape. A conductive layer is deposited over the first insulating layer. The conductive layer includes a planar surface. A second insulating layer is formed over the conductive layer. A portion of the encapsulant is removed to expose the semiconductor die and the interconnect structure. The modular interconnect unit includes a vertical interconnect structure. The modular interconnect unit forms part of an interlocking pattern around the semiconductor die.