PWM Signal Generation Unit With Additional Bit Register
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Solution Overview
Problem
Conventional PWM waveform generation apparatuses have limited resolving power, allowing pulse width to be changed only up to twice the clock cycle of an up/down counter, which restricts the accuracy of motor control due to coarse configuration of pulse width.
Innovation Solution
Incorporating an additional bit in a PWM signal generation apparatus with an up/down counter and a comparator, allowing the pulse width to be finely controlled by changing the pulse width based on the additional bit, thereby increasing the resolving power of the PWM signal.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a conventional up/down counter with compare register is used to generate PWM signal, then the device complexity is kept to a minimum, but the resolving power of the PWM output signal is only 1/2 of that of the compare value and counter
Solution Approach 1:
The patent segments the pulse width control into two independent parts: the compare register value (N) that determines the base pulse width, and a new additional bit register that provides fine-grained adjustment. This segmentation allows the system to achieve high resolving power by independently controlling the least significant bit of the pulse width without increasing overall device complexity, as the additional bit register is a simple 1-bit storage element.
Solution Approach 2:
The patent adds a new dimension to the PWM control by introducing an additional bit that operates independently from the conventional compare register. This additional bit provides a new degree of freedom for pulse width control, enabling resolving power equivalent to the clock cycle frequency rather than half of it, without requiring a complete redesign of the existing counter-compare register architecture.
2Manufacturing precision
If the pulse width is determined by comparing counter value and register value in conventional PWM generation, then the processing capacity of Micro Controller Unit is reduced, but the pulse width cannot be finely configured
Solution Approach 1:
The patent performs preliminary action by pre-configuring the additional bit register with the fine adjustment value before the PWM generation process begins. This allows the Micro Controller Unit to simply read the pre-prepared additional bit value and combine it with the compare register value, rather than performing complex calculations during runtime. This preliminary preparation maintains high processing capacity while achieving fine pulse width configuration for accurate motor control.
3Measurement precision
If a 16-bit up/down counter is used, then the count number is 65536, but the pulse width can be changed only up to twofold time of clock cycle
Solution Approach 1:
The patent changes the parameter of pulse width resolution by introducing the additional bit register that directly controls the least significant bit of the pulse width. This parameter change allows the system to achieve clock-cycle-level resolution (1/65536 of the period) without requiring complex configuration procedures. The ease of operation is maintained because the additional bit can be set through a simple register write operation, and the system automatically handles the combination with the compare register value.
Data Source
AI summary
A PWM signal generation of the present invention includes a counter, a compare register, a comparator comparing a compare value of the compare register with a count value of the counter and outputting an identity signal, a PWM signal generation circuit determining a pulse width of a PWM signal according to the identity signal, and an additional bit setting register storing an additional bit provided to change the pulse width of the PWM signal.