PWM Power Amplifier Mid-Voltage Switching for Harmonic Suppression
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Solution Overview
Problem
Near Field Communication (NFC) devices using push pull class D power amplifiers face inefficiencies due to the need for high-quality electromagnetic compatibility (EMC) filters to suppress unwanted higher harmonics, which result in power losses and increased costs.
Innovation Solution
A power amplifier with a pulse wave modulation (PWM) controller and a mid-voltage control circuit that temporarily holds output voltages at a mid-voltage between VDD and VSS, reducing higher order harmonics and minimizing the need for secondary filtering.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-generated harmful factors
If high quality EMC filters are used to suppress unwanted higher harmonics, then harmonic suppression is improved, but power losses increase and system efficiency decreases
Solution Approach 1:
The patent applies preliminary action by holding the output voltage at a mid-voltage level during the interval when the switching transistor is off, before the output can transition to the full voltage swing. This pre-action prevents the generation of high dv/dt transitions that create higher harmonics, thereby reducing the need for power-intensive EMC filtering while maintaining harmonic suppression
2Object-generated harmful factors
If high quality EMC filters are used to suppress unwanted higher harmonics, then harmonic suppression is improved, but device cost and size increase
Solution Approach 1:
The mid-voltage control circuit performs preliminary action by preparing the output voltage at a intermediate level during the switching off interval, preventing the conditions that generate harmful harmonics in the first place. This eliminates or reduces the need for complex EMC filters, thereby reducing device complexity, size, and cost while maintaining effective harmonic suppression
3Power
If push pull class D power amplifier is used to drive maximum energy, then power output is improved, but unwanted higher harmonics are generated
Solution Approach 1:
The patent applies dynamics by dynamically adjusting the output voltage during the switching cycle. Instead of a static square wave output, the voltage is dynamically held at a mid-voltage level during the off interval, creating a more controlled voltage transition that maintains high power output while reducing the generation of higher harmonics through smoother voltage changes
Data Source
AI summary
Embodiments of a power amplifier and method of operating a power amplifier are disclosed. In one embodiment, a power amplifier includes a pulse wave modulation (PWM) controller, a first power control stage configured to drive a first output between VDD and VSS in response to a control signal from the PWM controller, a second power control stage configured to drive a second output between VDD and VSS in response to a control signal from the PWM controller, and a mid-voltage control circuit configured to hold the voltage of the first output at a mid-voltage that is between VDD and VSS during an interval between when the first output is driven between VDD and VSS and hold the voltage of the second output at the mid-voltage during an interval between when the first output is driven between VDD and VSS.