Pulse-Width Modulated Clock Signal Switching
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Solution Overview
Problem
Distributed systems face delays in switching between redundant hardware elements during failures, which affects the timeliness of clock signal switchover in network operations, especially in large-scale computing and data storage systems.
Innovation Solution
A system that utilizes pulse-width modulated clock signals to transmit status information between line cards and timing cards, enabling quick switchover by encoding data in the duty cycle of clock signals, allowing for fast and accurate switching without additional control interfaces or dedicated paths.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If redundant hardware elements are incorporated for protection against failures, then system reliability is improved, but switching time between redundant elements increases
Solution Approach 1:
The patent applies preliminary action by pre-modulating clock signals with status information from multiple line cards before a failure occurs. The timing card receives and processes PWM-modulated clock signals from both primary and standby line cards in advance, encoding their operational status in the duty cycle variations. When a failure occurs, the switching decision can be made immediately based on pre-analyzed status information, eliminating the need for post-failure detection and analysis delays.
Solution Approach 2:
The patent implements feedback by continuously monitoring the status of line cards through PWM-modulated clock signals. The duty cycle variations in these signals provide real-time feedback about the operational state of each line card. This continuous feedback mechanism allows the timing card to detect failures immediately and trigger rapid switching to redundant hardware, resolving the contradiction between maintaining reliability through redundancy and minimizing switching time.
2Measurement precision
If status information is transmitted through dedicated control interfaces, then switching accuracy is improved, but system complexity increases
Solution Approach 1:
The patent applies merging by combining status information transmission with the existing clock signal distribution infrastructure. Instead of using separate dedicated control interfaces, the line cards modulate their status information onto the clock signals themselves using PWM technology. The timing card extracts this status information from the duty cycle variations of the received clock signals. This merging approach maintains switching accuracy by providing status information through the same channel used for clock distribution, while avoiding the added complexity of separate control interfaces.
Solution Approach 2:
The patent implements universality by making the clock signals serve multiple functions: they provide timing synchronization to the timing card and simultaneously carry status information about the line cards through PWM modulation. This multi-functional use of existing clock signal paths eliminates the need for dedicated control interfaces, reducing system complexity while maintaining the ability to make accurate switching decisions based on line card status.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach minimizes the time spent in holdover or unknown states, reduces phase hits, and ensures timely operation by allowing swift switching between clock sources, enhancing the reliability and efficiency of network operations.
Implementation Method 1
a pulse-width modulation module, the pulse-width modulation module receiving the divided clock signal and the status information, the pulse-width modulation module encoding the status information into a duty cycle of the divided clock signal
Implementation Method 2
a phase-locked loop that receives the selected one of the clock signals from the multiplexer and provides an output clock signal
Data Source
AI summary
A system that switches between a clock signal from a first line card and a clock signal from a second line card based on information transmitted from the first line card and the second line card on timing signals is presented. Some methods include receiving a first pulse-width modulated clock signal from a first line card, the first pulse-width modulated clock signal including information regarding the status of the first line card; receiving a second pulse-width modulated clock signal from a second line card, the second pulse-width modulated clock signal including information regarding the status of the second line card; producing a clock signal from the first pulse-width modulated clock signal; and switching to producing the clock signal from the second pulse-width modulated clock signal based on the information in the first pulse-width modulated clock signal.