PWM DAC Element Shifting for Low-Power High Dynamic Range

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Solution Overview

Problem

Audio devices face challenges in achieving high dynamic range with low harmonic distortion while minimizing power consumption, as existing DAC technologies, such as current and resistor DACs, introduce errors and increase power consumption with increased dynamic range.

Innovation Solution

A digital-to-analog converter method that includes an array of elements operable over several time steps, with drive sequences shortened when the digital signal is below a threshold, allowing for dynamic disabling and shifting of elements to reduce power consumption without compromising dynamic range.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If the number of DAC elements is increased to achieve high dynamic range, then the dynamic range is improved, but the power consumption increases

Engineering Contradiction:
Improvedynamic rangeVSAvoidpower consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The patent implements dynamic control of DAC elements by selectively enabling and disabling individual elements based on the amplitude level of the input signal. When the signal amplitude is low, fewer DAC elements are activated; when the signal amplitude is high, more elements are enabled. This dynamic adaptation allows the system to maintain high dynamic range performance when needed while minimizing power consumption during low-signal conditions.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes the operational parameters of the DAC by adjusting the number of active elements based on signal characteristics. The control logic modifies which DAC elements are powered and which are disabled, effectively changing the system's power state and element configuration dynamically rather than operating at fixed parameters.

Inventive Principle:
Principle #35Parameter changes

2Measurement precision

If current and resistor DACs are used to achieve high dynamic range, then the dynamic range is improved, but linearity degrades due to output errors during code changes

Engineering Contradiction:
Improvedynamic rangeVSAvoidlinearity
Core Design Contradiction:
Measurement precisionVSManufacturing precision

Solution Approach 1:

The DAC is divided into multiple independent elements that can be selectively activated. By segmenting the DAC into individually controllable units, the system can activate only the necessary number of elements based on signal requirements, reducing the occurrence of linearity errors during code transitions while maintaining the ability to achieve high dynamic range when full resolution is needed.

Inventive Principle:
Principle #1Segmentation

3Manufacturing precision

If PWM technique is applied to current and resistor DACs to improve linearity, then linearity is improved, but minimum power consumption is still determined by desired dynamic range

Engineering Contradiction:
ImprovelinearityVSAvoidminimum power consumption
Core Design Contradiction:
Manufacturing precisionVSUse of energy by moving object

Solution Approach 1:

The system applies partial action by activating only a subset of DAC elements based on signal amplitude requirements. Instead of continuously operating all elements at full capacity, the system uses just enough elements to handle the current signal level, thereby reducing minimum power consumption while maintaining linearity through selective element activation rather than requiring full PWM operation of all elements.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS10833687B1Digital to analog circuit
Publication Date: 2020.11.10 DIALOG SEMICONDUCTOR (UK) LTD
  • US10833687B1 patent drawing
  • US10833687B1 patent drawing
  • US10833687B1 patent drawing

AI summary

A method and associated system have been proposed to achieve power savings in PWM DACs by truncating PWM sequences and maximizing the amount of time available to power up a DAC cell without sacrificing sensitivity to element mismatch. The DAC circuit includes a driver to receive a digital input and to provide a plurality of drive sequences, a digital-to-analog converter, and a controller.The digital-to-analog converter includes an array of digital-to-analog elements operable over several time steps. Upon identifying that the digital signal is below a threshold value, the controller is configured to shorten the drive sequences; and for each time step to identify a first set of elements and a second set of elements among the array of digital-to-analog elements; to apply the shortened drive sequences to the first set; to disable the second set; and to shift the first set and the second set by one element.