PWM Driver Communication for Low-Power Switching Regulators
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Solution Overview
Problem
Conventional synchronous switching voltage regulators require a dedicated FCCM pin for diode emulation mode communication, which increases pin count and layout complexity, especially in multiphase arrangements where pin availability is limited.
Innovation Solution
A method that uses a PWM mode signal with at least three levels, including an intermediate level, to communicate mode information between a PWM controller and gate drivers, eliminating the need for a dedicated FCCM pin by encoding mode information into the PWM signal.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If a dedicated FCCM pin is used for diode emulation mode communication, then the regulator can enter low power modes, but the pin count and layout complexity increase
Solution Approach 1:
The patent combines the FCCM communication function with the existing PWM signal by adding an intermediate voltage level to the PWM output. This merging eliminates the need for a separate FCCM pin while preserving the diode emulation mode communication capability, thereby reducing pin count and layout complexity without sacrificing light load efficiency
Solution Approach 2:
The PWM signal is designed to serve multiple functions: it continues to provide standard PWM control while simultaneously encoding FCCM mode information through its intermediate level. This multi-functionality allows a single pin to replace what would traditionally require two separate pins, resolving the contradiction between functionality and complexity
2Productivity
If the number of phases increases in multiphase arrangements, then the regulator can handle heavier loads, but the PCB layout becomes complex and traces become crowded
Solution Approach 1:
By merging the FCCM signal transmission into the existing PWM signal path, the patent eliminates the need for additional dedicated FCCM traces. This allows multiphase regulators to scale to higher phase counts without proportionally increasing PCB trace complexity, as the same PWM traces carry both control and mode communication signals
3Device complexity
If controllers and gate drivers have low pin counts, then the device is more compact, but there may be no pin available for FCCM signal accommodation
Solution Approach 1:
The PWM output pin is designed to provide multiple functions: standard PWM switching control and FCCM mode communication. By encoding the FCCM information in the intermediate voltage level of the PWM signal, the patent enables low pin-count devices to maintain FCCM capability without requiring additional pins, thus preserving adaptability while reducing pin count
Data Source
AI summary
Pulse width modulation (PWM) controllers and output stage driver circuits and related methods of communicating switching regulator mode information. The controller includes circuitry that recognizes intervals when the load driven by the regulator is in a low power mode. Responsive to recognizing the low power mode, the controller generates a PWM mode signal having at least three (3) different levels including at least one intermediate level that is coupled to at least one driver. Based on the PWM mode signal, the regulator is switched into a power saving low power operational mode.