Pulse Frequency Modulating Circuit Dynamic Enable Time Control
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Solution Overview
Problem
Existing power supply systems face inefficiencies in energy conversion due to fixed enable times in pulse frequency modulating circuits, leading to increased development costs and delayed product delivery as manufacturers manually adjust these times through trial and error.
Innovation Solution
A pulse frequency modulating circuit that automatically adjusts the enable time of the pulse signal based on the number of logic state changes or logic state changing time within a preset period, optimizing energy conversion efficiency by dynamically controlling the output voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If the enable time is set too short, then the power supply can save energy, but the output voltage cannot be pulled up quickly enough
Solution Approach 1:
The patent applies dynamics by making the enable time dynamic rather than fixed. The pulse generating circuit automatically adjusts the enable time based on real-time detection of output voltage feedback, extending it when voltage needs boosting and shortening it when voltage is stable, thus optimizing both energy efficiency and voltage pull-up speed under different operating conditions
Solution Approach 2:
The patent implements feedback by using the output voltage signal to control the enable time of the pulse signal. The feedback circuit monitors the output voltage and feeds this information back to the pulse generating circuit, which then adjusts the enable time accordingly, creating a closed-loop control system that balances energy efficiency and voltage regulation performance
2Speed
If the enable time is set too long, then the output voltage can be pulled up quickly, but more power is wasted and energy conversion efficiency decreases
Solution Approach 1:
The patent makes the enable time dynamic by continuously adjusting it based on the output voltage feedback. When the output voltage reaches the desired level, the enable time is automatically shortened or stopped, preventing further energy waste while maintaining quick voltage response capability when needed
Solution Approach 2:
The feedback mechanism monitors the output voltage and provides real-time information to the pulse generating circuit. This feedback allows the system to reduce the enable time once the voltage target is achieved, thereby eliminating unnecessary energy consumption while preserving the ability to quickly adjust voltage when required
3Adaptability or versatility
If manual trial and error method is used to adjust enable time, then the power supply can be customized for different applications, but development costs increase and product delivery is delayed
Solution Approach 1:
The patent applies self-service by enabling the pulse generating circuit to automatically determine and adjust the optimal enable time based on the specific application's load characteristics and output voltage requirements. The circuit performs self-adjustment without requiring external manual experimentation, thus maintaining application-specific optimization while dramatically reducing development time and costs
Solution Approach 2:
The patent implements parameter changes by allowing the enable time parameter to be automatically adjusted based on detected operating conditions. The pulse generating circuit changes the enable time parameter dynamically according to the application's actual performance needs, eliminating the need for manual parameter tuning while achieving application-specific optimization
Data Source
AI summary
A method for stabling a voltage, a pulse frequency modulating circuit and a power supply using the same are provided. The method includes the following steps. First, a comparing signal is provided. Then, set the comparing signal to be a first logic state when the voltage to be stabilized is lower than a preset voltage. Next provide a pulse signal when the comparing signal is set in the first logic state. Afterwards, adjust the enable time of the pulse signal based on the number of times of logic state changing of the comparing signal within a preset period and, adjust the voltage according to the enable time of the pulse signal.


