PWM Frequency Dithering for EMI Reduction in Switch Mode Power Supplies
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Solution Overview
Problem
Larger capacity switch mode power supplies face challenges in meeting stringent electromagnetic interference (EMI) emission requirements, as they generate excessive radio frequency energy at specific frequencies, leading to certification and compliance issues.
Innovation Solution
Implementing a PWM frequency dithering circuit that varies the pulse width modulation clock frequency, spreading EMI energy over a range of frequencies, thereby reducing peak emissions at any single frequency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-generated harmful factors
If the power supply uses fixed frequency PWM switching, then the control is simple and efficient, but excessive EMI energy is generated at specific frequencies
Solution Approach 1:
The patent implements dynamic frequency variation by modifying the PWM clock signal frequency over time through a dithering circuit. The clock frequency is varied around a central value to spread EMI energy across multiple frequencies, transforming the static switching frequency into a dynamic parameter that adapts to reduce peak EMI emissions at any single frequency.
Solution Approach 2:
The patent changes the PWM switching frequency parameter by introducing frequency dithering. The clock frequency is modulated with small variations around a nominal value, causing the switching frequency to change dynamically. This parameter change spreads the EMI spectral energy density across a broader frequency range, reducing peak emissions at any specific frequency while maintaining overall switching efficiency.
2Object-generated harmful factors
If the PWM frequency is varied to spread EMI energy, then peak EMI emissions are reduced, but the control circuit complexity increases
Solution Approach 1:
The patent introduces a frequency dithering circuit as an intermediary component between the PWM controller and the power switching stage. This intermediary circuit generates the frequency-modulated clock signal that drives the PWM switching, effectively decoupling the complexity of frequency modulation from the main control logic and isolating it in a dedicated frequency generation stage.
3Power
If larger capacity power transistors are used, then higher power output is achieved, but more EMI is generated
Solution Approach 1:
The patent converts the harmful concentrated EMI energy into a beneficial spread spectrum pattern. By intentionally varying the switching frequency, the concentrated EMI peaks are transformed into a distributed low-level emission across a broader frequency range, effectively converting the harm of high-power switching into a beneficial EMI reduction effect.
Data Source
Figure 1~2
Figure 3
AI summary
A switch mode power supply has pulse width modulation (PWM) frequency dithering of a PWM clock frequency. The PWM frequency dithering circuit may change the frequency of the PWM clock based upon each of a plurality of frequencies. A PWM time base circuit may comprise a period register containing a PWM period value, a comparator, and a PWM counter, wherein a PWM count value may be incremented in the PWM counter by the variable frequency PWM clock, the comparator may compare the PWM period value with the PWM count value and when the PWM period value and the PWM count value are substantially equal the PWM count value may be reset. The PWM frequency dithering circuit may comprise a roll counter, wherein the roll counter changes a roll count value each time the comparator resets the PWM count value in the PWM counter; a multiplexer having a plurality of inputs and an output, wherein the output is coupled to each one of the plurality of inputs of the multiplexer based upon the roll counter count value; and a plurality of frequency registers, each one of the plurality of frequency registers may be coupled to a respective one of the plurality of inputs of the multiplexer; wherein the output of the multiplexer may be coupled to a frequency control input of the variable frequency PWM clock such that frequency values stored in the plurality of frequency registers may be used in determining the variable frequency PWM clock frequency.