PWM Circuit Using MSB-LSB Partitioning for High-Resolution Output
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Solution Overview
Problem
Conventional PWM circuits face challenges in achieving high color resolution due to the requirement of high-frequency clocks, which is difficult to pass through materials like glass and often results in electromagnetic interference (EMI).
Innovation Solution
A PWM circuit design that partitions the PWM value into most-significant-bits (MSB) and least-significant-bits (LSB) values, using a low-frequency clock for the PWM generator and generating a delay signal based on the LSB value to produce a high-resolution PWM signal through logical operations between the primary and delay signals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If high-frequency clock is used to achieve high color resolution in PWM circuit, then color resolution is improved, but electromagnetic interference increases and clock transmission through glass becomes difficult
Solution Approach 1:
The PWM value is segmented into MSB value and LSB value. The MSB value controls the primary signal duty cycle while the LSB value controls the delay time. This segmentation allows the system to achieve high color resolution (e.g., 17-bit precision) without requiring a high-frequency clock, as the effective resolution is achieved through temporal delay rather than high-frequency switching.
2Measurement precision
If high-frequency clock is used to achieve high color resolution in PWM circuit, then color resolution is improved, but transmission through glass becomes difficult
Solution Approach 1:
The invention changes the operating parameter from high-frequency clock to low-frequency clock combined with delay time control. By using a low-frequency clock (e.g., 1 MHz or lower) and introducing variable delay times based on the LSB value, the system achieves the same high color resolution without the need for high-frequency clock transmission through the glass substrate, thereby simplifying the manufacturing process.
Data Source
AI summary
A pulse-width modulation (PWM) circuit includes a partition circuit coupled to receive a PWM value representing a duty cycle of a PWM signal to be generated, and configured to accordingly generate a most-significant-bits (MSB) value representing higher-order bits of the PWM value and a least-significant-bits (LSB) value representing lower-order bits of the PWM value; a PWM generator coupled to receive the MSB value or a derivative thereof, and configured to accordingly generate a primary signal with a duty cycle corresponding to the MSB value; a delay circuit that generates a delay signal representing the primary signal with delay time determined according to the LSB value or a derivative thereof; and a combine circuit that generates the PWM signal according to the primary signal and the delay signal, by performing a logical operation on the primary signal and the delay signal.