PWM Output Stage With In-Cycle Sampling for Lower Latency
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Solution Overview
Problem
Pulse-width modulation (PWM) technologies face significant latency issues in data transmission, which increase exponentially with the required resolution, limiting the achievable speed of control loops that utilize sensor data.
Innovation Solution
A PWM output stage and method that samples data signals at multiple times, generating PWM cycles with variable first and second phases, allowing for dynamic adjustment of phase durations based on data samples taken at different times within each cycle, effectively reducing transmission latency by representing the latest data sample in each PWM period.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If traditional PWM transmits one data sample per PWM period, then the transmission structure is simple, but the transmission latency increases exponentially with required resolution
Solution Approach 1:
The patent performs a first data sample and sets the first phase duration before the PWM cycle begins, preparing the initial PWM structure in advance. This preliminary action allows the second data sample taken during the cycle to only need to adjust the second phase, rather than determining the entire PWM structure, thereby reducing latency without excessive complexity
Solution Approach 2:
The patent makes the PWM cycle dynamic by allowing the second phase duration to be adjusted based on a second data sample taken during the PWM cycle. This dynamic adjustment enables the system to incorporate latest data while the PWM is still being generated, significantly reducing transmission latency compared to static single-sample-per-period approaches
2Speed
If PWM uses fixed phase durations, then the generation process is simple, but the control loop speed is limited by transmission delay
Solution Approach 1:
The patent implements variable phase durations where the first phase duration is set based on a first data sample and the second phase duration is adjusted based on a second data sample taken during the PWM cycle. This dynamic variability allows the system to adapt to changing conditions and reduce control loop latency, directly improving control loop speed
Solution Approach 2:
The patent uses feedback by taking a second data sample during the PWM cycle and using it to adjust the second phase duration. This feedback mechanism ensures that the latest data is incorporated into the PWM output, improving control loop responsiveness and speed without requiring completely new PWM structures
3Loss of information
If PWM samples data only once per period, then the data processing is simple, but the reception delay significantly lags behind sampling time
Solution Approach 1:
The patent performs the first data sample and sets the first phase duration as a preliminary action before the PWM cycle begins. This preliminary sampling establishes the initial PWM structure while reserving the ability to update with a second sample taken during the cycle, ensuring data freshness without requiring complete re-sampling
Solution Approach 2:
The patent implements dynamic data sampling by taking a second data sample during the PWM cycle and using it to adjust the second phase duration. This dynamic approach ensures that the PWM output reflects the latest available data, reducing the reception delay and information loss compared to single static sampling per period
Data Source
AI summary
A pulse-width modulation (PWM) output stage includes a data source configured to generate a data signal; and a pulse-width modulator configured to sample the data signal at a plurality of sampling times and generate a PWM signal based on a plurality of data samples corresponding to the plurality of sampling times. The PWM signal includes a PWM cycle having a first phase of a first duration and a second phase of a second duration. The pulse-width modulator is configured to sample a first data sample at a first sampling time prior to the first phase, set the first duration and the second duration of the PWM cycle based on the first data sample, sample a second data sample at a second sampling time during the second phase, and adjust the second duration of the first PWM cycle based on the second data sample.