PWM I/O Pad Feedback for Edge Asymmetry Correction
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Solution Overview
Problem
Pulse-width-modulated (PWM) signals used in electronic systems often experience asymmetry in rising and falling edges due to differences in transistor pull-up and pull-down times, leading to reduced resolution and inaccurate operation of load circuits.
Innovation Solution
An asymmetry detection circuit is implemented to detect and correct the asymmetry by providing a control signal that adjusts the PWM signal, ensuring symmetry in edge timing and slope, thereby maintaining high-resolution PWM signals for load circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If PWM signals are used to control load circuits, then power conversion efficiency is improved, but asymmetry in rising and falling edges reduces signal resolution and operational accuracy
Solution Approach 1:
The patent implements a feedback mechanism where the PWM signal is routed through a buffer, and the buffer output is fed back to a delay element. The delay element introduces a compensating time delay to the PWM signal before it reaches the load circuit. This feedback loop allows the system to automatically compensate for the asymmetry in rising and falling edges, maintaining signal resolution and operational accuracy while preserving the power conversion efficiency benefits of PWM control.
Solution Approach 2:
The patent changes the timing parameters of the PWM signal by introducing a controllable delay through a delay element in the signal path. By adjusting the delay parameter, the system compensates for the asymmetric rise and fall times of the PWM signal, effectively correcting the signal resolution without changing the fundamental PWM control mechanism or sacrificing power conversion efficiency.
2Speed
If transistor pull-up and pull-down circuits are used to drive PWM signals, then switching speed is improved, but differences in pull-up and pull-down times cause edge asymmetry
Solution Approach 1:
The patent introduces a buffer circuit as an intermediary between the PWM signal source and the load circuit. The buffer isolates the asymmetric pull-up and pull-down effects from directly affecting the load, and its output is fed back through a delay element that compensates for the asymmetry. This intermediary approach maintains the fast switching speeds provided by the transistor circuits while correcting the edge symmetry issue.
Solution Approach 2:
The patent applies preliminary action by introducing a delay to the PWM signal in advance before it reaches the load circuit. The delay element pre-compensates for the expected asymmetry in rising and falling edges, ensuring that by the time the signal reaches the load, the edges are symmetric. This preliminary correction maintains both switching speed and edge symmetry.
3Ease of operation
If signal routing through I/O pads and buffers is implemented, then signal distribution is improved, but pad asymmetry and routing differences degrade signal resolution
Solution Approach 1:
The patent routes the PWM signal through the I/O pad and buffer, then feeds the buffer output back to a delay element. This feedback path allows the system to measure the actual signal characteristics after passing through the pad and buffer, and apply compensating delay to correct for any asymmetry introduced by the routing. This maintains signal distribution ease while preserving signal resolution.
Solution Approach 2:
The patent changes the timing parameter of the PWM signal by introducing a compensating delay that specifically addresses the asymmetry introduced by the I/O pad and buffer routing. By adjusting this delay parameter, the system corrects the signal resolution degradation while maintaining the beneficial signal distribution provided by the pad and buffer structure.
Data Source
AI summary
Some examples relate to a system including a pulse modulation (PM) circuit having a PM input and a PM output. The system also includes a load circuit having a load circuit input, and an I/O pad coupling the PM output to the load circuit input. An asymmetry detection circuit has a first asymmetry detection (AD) input coupled to the PM output via a first feedback path, a second AD input coupled to an output node of the I/O pad via a second feedback path, and an AD output coupled to the PM input of the pulse modulation circuit via a control path.