PWM Pulse Skipping Control for Light-Load Power Converters
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Switching mode power supplies experience low efficiency at light loads due to increased power consumption by the PWM controller, as the output load decreases.
Innovation Solution
A switching mode power converter with pulse skipping and a control method that includes a control circuit with a current source and a capacitor, which charges and discharges based on the PWM signal, triggering pulse skipping when the capacitor voltage drops below a skip threshold.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If PWM controller continuously switches to regulate output voltage, then output voltage regulation is maintained, but power consumption increases significantly at light loads
Solution Approach 1:
The patent implements periodic action by using pulse skipping mode where the PWM controller alternates between continuous switching and skipped pulses. At light loads, instead of continuous PWM switching, the controller skips pulses periodically, reducing switching frequency and power consumption while still maintaining output voltage regulation through the capacitor discharge mechanism.
Solution Approach 2:
The patent applies dynamics by making the switching behavior adaptive based on load conditions. The control circuit dynamically adjusts between PWM mode and pulse skipping mode using a capacitor voltage threshold comparison. When the capacitor voltage drops below the threshold, pulse skipping is triggered, creating a dynamic response that optimizes power consumption based on actual load requirements.
2Use of energy by moving object
If pulse skipping is implemented to reduce power consumption, then efficiency at light loads improves, but output voltage regulation becomes more challenging
Solution Approach 1:
The patent introduces a capacitor as an intermediary energy storage element between the PWM controller and the output load. This capacitor acts as a buffer that maintains output voltage during skipped pulses by discharging its stored energy. The capacitor voltage serves as an intermediary signal that triggers pulse skipping when it drops below a threshold, ensuring smooth transition and maintaining regulation.
Solution Approach 2:
The patent implements feedback by continuously monitoring the capacitor voltage and comparing it against a reference threshold. When the capacitor voltage drops below the threshold, the control circuit triggers pulse skipping to prevent further voltage drop. This feedback mechanism ensures that output voltage regulation is maintained even during pulse skipping operation at light loads.
Data Source
AI summary
A control circuit is coupled to a power converter having an input voltage VIN and an output voltage VOUT. The control circuit includes a capacitor connected between a current source and a ground. The current source is configured to charge the capacitor with a current αVIN or α(VIN−VOUT) when a pulse width modulate (PWM) signal of a PWM controller of the power converter is high, and to discharge the capacitor with a current α(−VOUT) or α(VIN−VOUT) when the PWM signal is low. α is a pre-configured constant. The control circuit is configured to trigger the PWM controller to skip pulses when a voltage across the capacitor decreases to be less than a threshold before a present switching cycle of the power converter ends.


