PWM Reference Waveform Phase Control for Signal Demodulation

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Solution Overview

Problem

Phase sensitive detectors require a reference signal with the same frequency as the carrier to demodulate and extract signals effectively, but existing systems lack precise control over the phase shift of the reference signal, limiting their accuracy and adaptability.

Innovation Solution

A system utilizing pulse-width modulation (PWM) channels with adjustable duty cycles to generate a reference waveform with a variable phase offset relative to a carrier waveform, achieved through combinational logic and PWM modules within a microprocessor, allowing for fine control of phase shifts up to 180 degrees.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a reference signal is generated for phase sensitive detection, then signal demodulation and extraction can be performed, but precise control over the phase shift of the reference signal is lacking, limiting accuracy and adaptability

Engineering Contradiction:
Improvephase shift control precisionVSAvoidphase shift adjustability
Core Design Contradiction:
Measurement precisionVSAdaptability or versatility

Solution Approach 1:

The patent implements dynamic phase shift control by making the reference signal phase adjustable through a variable delay element. The delay amount can be dynamically changed to provide different phase shifts, enabling both precise control and adaptability. The system allows the reference signal phase to be varied to match different carrier signal phases, resolving the contradiction between precision and versatility.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the phase parameter of the reference signal by introducing a variable delay element that can adjust the time delay applied to the reference signal. By modifying the delay parameter, the system achieves precise phase shift control while maintaining adaptability to different detection requirements, directly addressing the technical contradiction.

Inventive Principle:
Principle #35Parameter changes

2Measurement precision

If the reference signal phase is fixed, then system complexity is reduced, but signal demodulation accuracy decreases when phase mismatch occurs

Engineering Contradiction:
Improvesignal demodulation accuracyVSAvoidphase control system complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent introduces a dynamic phase adjustment mechanism that allows the reference signal phase to be varied as needed. This dynamic capability improves demodulation accuracy when phase mismatch occurs, while the implementation using standard signal processing components keeps the added complexity manageable.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent uses a variable delay element as an intermediary component between the reference signal generator and the phase sensitive detector. This intermediary provides the necessary phase adjustment capability to improve accuracy without requiring a complete redesign of the system, thus limiting the increase in overall complexity.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS8653873B2Generation of adjustable phase reference waveform
Publication Date: 2014.02.18 HEWLETT PACKARD DEVELOPMENT COMPANY LP
  • US8653873B2 patent drawing
  • US8653873B2 patent drawing
  • US8653873B2 patent drawing

AI summary

One embodiment provides a system for generating a reference waveform. The system can include a first pulse-width modulation (PWM) channel configured to provide a first PWM waveform having a first duty cycle and a first frequency. A second PWM channel is configured to provide a second PWM waveform having a second duty cycle and the first frequency. Combinational logic is configured to combine the first PWM waveform and the second PWM waveform to generate a phase-shifted reference PWM waveform having the first frequency and a phase shift that is based on the first duty cycle and the second duty cycle.