PWM Circuit Register Update Logic for Abnormal Duty Cycle Prevention
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Solution Overview
Problem
In applications using multiple pulse-width modulation (PWM) circuits, abnormal duty cycles can lead to control loop instability and damage to transistors, and existing solutions either require additional circuitry or limit the duty cycle, which can result in unsuitable output voltage/current ripple.
Innovation Solution
A PWM system with control circuitry that identifies operational conditions causing abnormal duty cycles and updates PWM control registers to prevent such occurrences, allowing duty cycles to range from 0% to 100% without additional circuitry, such as programmable logic devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If additional circuitry is used to prevent abnormal duty cycles, then reliability is improved, but device complexity increases
Solution Approach 1:
The PWM circuit performs self-diagnosis by monitoring its own counter and register states. The system detects potential abnormal duty cycle conditions and automatically corrects them through controlled register updates, eliminating the need for external protection circuitry while maintaining full reliability
Solution Approach 2:
The system implements feedback by continuously monitoring the counter value and duty cycle register state. When an abnormal condition is detected (counter equals duty cycle register value), the system feeds back control signals to prevent incorrect register updates, thereby preventing abnormal duty cycles without adding complex external circuitry
2Reliability
If duty cycle is limited to prevent abnormal conditions, then reliability is improved, but adaptability deteriorates
Solution Approach 1:
The system dynamically adjusts the duty cycle register update timing based on real-time counter state. Rather than imposing static duty cycle limits, the system adapts its update behavior to prevent abnormal conditions while allowing the full 0%-100% duty cycle range, maintaining both reliability and adaptability
Solution Approach 2:
The system takes preliminary action by checking the counter value before allowing duty cycle register updates. This preemptive check prevents abnormal duty cycles from occurring in the first place, allowing the system to maintain full duty cycle flexibility without compromising control loop stability
3Productivity
If register updates are performed continuously, then productivity is improved, but harmful factors increase
Solution Approach 1:
The system uses feedback control to monitor counter and register states before each update operation. When the counter value equals the duty cycle register value, the feedback mechanism blocks the update operation, preventing abnormal duty cycles while allowing continuous updates under normal conditions
Solution Approach 2:
The system applies preliminary anti-action by detecting potential abnormal conditions (counter equals duty cycle register value) before they can cause harmful effects. The control logic preemptively prevents register updates that would generate abnormal duty cycles, eliminating the harmful effect before it occurs
Data Source
AI summary
A pulse width modulation (PWM) system includes a PWM circuit and a controller. The PWM circuit includes a counter, a period register, and a duty cycle register. The controller is coupled to the PWM circuit. The controller is configured to calculate a period value and a duty cycle value. The controller is also configured to load the duty cycle value into the duty cycle register responsive to a count value of the counter being equal to a value of the duty cycle register and the duty cycle value being less than the period value.