PWM Controller Synchronization Using Gradual Counter Adjustment
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Solution Overview
Problem
In distributed power electronics systems, synchronization of PWM signals across multiple controllers can lead to glitches due to oscillator drift and varying clock timings, causing misalignment and inefficiencies in power stage operations.
Innovation Solution
A method where a secondary controller measures the error between the actual and expected receipt times of synchronization signals and adjusts its counter period gradually over subsequent PWM periods to synchronize with the primary controller, preventing sudden changes that could cause glitches.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a synchronization signal is transmitted from primary controller to secondary controllers to maintain PWM signal phase shift, then synchronization between controllers is improved, but timing errors and glitches occur due to oscillator drift and varying clock timings
Solution Approach 1:
The patent implements a feedback mechanism where the secondary controller measures the actual receipt time of the synchronization signal, calculates the timing error relative to the expected receipt time, and uses this error information to adjust its counter period. This closed-loop feedback approach continuously corrects synchronization drift caused by oscillator variations and clock timing differences, thereby improving synchronization accuracy while compensating for timing errors.
Solution Approach 2:
The patent dynamically adjusts the counter period parameter in the secondary controller based on the measured timing error. By changing the counter period parameter in response to detected synchronization deviations, the system adapts to oscillator drift and clock timing variations, maintaining accurate PWM signal synchronization across distributed controllers despite parameter variations in the time domain.
2Reliability
If the counter period is adjusted rapidly to correct synchronization error, then synchronization accuracy is improved, but glitches are introduced in the PWM signal
Solution Approach 1:
The patent implements a dynamic adjustment approach where the counter period is modified gradually over multiple PWM cycles rather than making abrupt changes. The secondary controller distributes the correction across several periods, adjusting the counter period incrementally to reach the target synchronization point. This dynamic, phased adjustment maintains PWM signal integrity and prevents glitches while achieving accurate synchronization.
Solution Approach 2:
The patent prepares for potential synchronization errors by implementing a gradual correction mechanism that cushions against abrupt changes. By distributing the synchronization correction over multiple PWM periods rather than applying it all at once, the system prevents harmful glitches from occurring, effectively cushioning the PWM signal against the adverse effects of rapid parameter changes.
3Adaptability or versatility
If oscillator frequency varies between controllers, then each controller can operate independently, but synchronization between PWM signals deteriorates
Solution Approach 1:
The patent uses feedback to continuously monitor and correct synchronization errors caused by oscillator frequency variations. Each secondary controller measures the actual timing of received synchronization signals and adjusts its counter period based on the measured error, enabling independent controllers with varying oscillator frequencies to maintain synchronized PWM output through continuous error correction.
Solution Approach 2:
The patent compensates for oscillator frequency variations by dynamically changing the counter period parameter in secondary controllers. This parameter adjustment allows each controller to adapt to its specific oscillator characteristics while maintaining synchronization with the primary controller, preserving both independent operation capability and PWM synchronization reliability.
Data Source
AI summary
A system includes a first controller configured to transmit a synchronization signal to a second controller. The second controller is configured to produce a PWM signal. The system also includes a counter configured to provide a count for the second controller, where the second controller is configured to initiate rising edges and falling edges of the PWM signal based on the count from the counter. The second controller is also configured to measure an error between a time when the synchronization signal is received at the second controller and an expected time of receipt for the synchronization signal. The second controller is also configured to adjust a period of the counter based at least in part on the error.