Switched-Capacitor PWM-to-Voltage Conversion With Offset Cancellation
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Solution Overview
Problem
Conventional methods for converting pulse-width modulated signals to analog voltage signals often introduce delays, phase shifts, and require large RC components, making them unsuitable for implementation in integrated circuits, and fail to effectively cancel system offsets due to component mismatches.
Innovation Solution
A converter circuit with two or more channels, each equipped with operational amplifiers and capacitors for negative feedback, and a controlled switch array that operates in integration, sampling, or reset modes in response to the PWM signal, integrating currents of opposite polarity across capacitors to achieve a linear relationship between duty-cycle and voltage output, allowing for offset cancellation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If conventional filters are used to convert PWM signals to analog voltage, then the conversion can be achieved, but the system introduces delays and phase shifts and requires large RC components that cannot be implemented in integrated circuits
Solution Approach 1:
The patent replaces conventional passive RC filter mechanisms with an active switched-capacitor integrator system. The mechanical/electrical filtering action is substituted by a controlled switching mechanism that achieves integration through discrete capacitor charging/discharging cycles, enabling IC implementation while maintaining conversion functionality.
Solution Approach 2:
The invention changes the operating parameters by using high-frequency switching of capacitors instead of continuous RC time constants. This parameter transformation allows the system to achieve integration effects without requiring large physical RC components, making it suitable for integrated circuit implementation while reducing signal delay through optimized switching frequencies.
2Measurement precision
If conventional conversion methods are used, then PWM to voltage conversion can be achieved, but system offsets due to component mismatches cannot be effectively cancelled
Solution Approach 1:
The patent divides the conversion system into multiple parallel integrator channels (typically three channels). Each channel processes the PWM signal independently and contributes to the final output. This segmentation allows individual channel offsets to be distributed and cancelled in the aggregate output, improving offset accuracy without requiring ultra-precise individual components.
Solution Approach 2:
The invention implements a feedback mechanism where the outputs of multiple integrator channels are combined and averaged. This feedback structure naturally cancels systematic offsets and mismatches across channels, achieving high measurement precision through statistical averaging rather than requiring individually precise components.
3Speed
If fast oversampling clocks are used to count PWM time difference, then conversion speed can be improved, but the system complexity increases and integration becomes difficult
Solution Approach 1:
The patent replaces complex high-speed counting and time-difference measurement mechanisms with a simpler switched-capacitor integrator approach. The conversion speed is achieved through the natural integration process and subsequent averaging of multiple channels, eliminating the need for complex high-frequency counters and time-measurement circuitry while maintaining fast response.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables efficient conversion of PWM signals to voltage outputs in integrated circuits with minimal gain error and complete cancellation of system offsets, facilitating continuous voltage output and improved mismatch cancellation.
Implementation Method 1
a first capacitor in each channel provides a negative feedback from a first output to a first input, and a second capacitor in each channel provides a negative feedback from a second output to a second input
Implementation Method 2
Each channel is conditioned by a controlled switch array in response to the PWM signal to operate in an integration mode, a sampling mode or a reset mode. For each channel, in the integration mode, the switch array selectively connects the reference current source of first polarity either to the first or to the second input of the operational amplifier
Implementation Method 3
integrating currents of opposite polarity across a capacitor. Under ideal conditions, this yields a true linear relationship between the duty-cycle of the PWM input signal and the analog voltage output signal
Implementation Method 4
a first capacitor in each channel provides a negative feedback from a first output to a first input, and a second capacitor in each channel provides a negative feedback from a second output to a second input
Data Source
AI summary
A converter circuit and method for converting a pulse-width modulated input signal into a voltage output signal eliminates an offset due to component mismatch. The converter circuit includes at least two channels. Each channel has an operational amplifier with differential inputs and differential outputs. A first capacitor in each channel provides a negative feedback from a first output to a first input and a second capacitor in each channel provides a negative feedback from a second output to a second input. Each channel is conditioned by a switch array in response to the pulse-width modulated signal to operate in a selected one of an integration mode, a sampling mode and a reset mode. In each channel, in the integration mode, the switch array selectively connects the reference current source of first polarity either to the first or to the second input of the operational amplifier, and the reference current source of second polarity to the other of the first and second inputs. In the sampling mode, the switch array selectively disconnects the reference current sources of first and second polarity and the outputs of the operational amplifier provide the voltage output signal. In the reset mode, the switch array selectively disconnects the reference current sources of first and second polarity and short-circuits the first and second capacitors.