Q Margin Calculation Using Per-Codeblock BER Thresholds

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Solution Overview

Problem

Conventional methods for calculating the Q margin in communication systems often fail to accurately identify errors in optical transport systems due to averaging Bit Error Rates (BER) over time, which can mask high error rates in individual FEC codeblocks, leading to incorrect assessments of the system's reliability and potential failures.

Innovation Solution

The method involves comparing the Bit Error Rate (BER) to a Forward Error Correction (FEC) threshold for each codeblock, rather than averaging over time, to determine the Q margin, ensuring that individual high error rates are identified and reported, thereby accurately assessing the system's reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If BER is averaged over time to calculate Q margin, then calculation complexity is reduced, but measurement precision deteriorates due to masking of high error rates in individual codeblocks

Engineering Contradiction:
Improvecalculation complexityVSAvoiderror rate detection accuracy
Core Design Contradiction:
Device complexityVSMeasurement precision

Solution Approach 1:

The patent segments the error detection process by evaluating each FEC codeblock individually rather than averaging BER across multiple codeblocks. This segmentation allows the system to identify high error rates in specific codeblocks that would otherwise be masked by averaging, thereby improving measurement precision without significantly increasing overall system complexity.

Inventive Principle:
Principle #1Segmentation

2Measurement precision

If individual codeblock BER is evaluated instead of averaging, then measurement precision is improved, but device complexity increases due to additional comparisons

Engineering Contradiction:
Improveerror rate detection accuracyVSAvoidcalculation complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent applies partial action by performing BER evaluation only at the necessary granularity level (per codeblock) without implementing more complex continuous monitoring or additional error analysis layers. This approach achieves the required measurement precision improvement while avoiding excessive complexity by stopping at the codeblock level rather than progressing to more granular or comprehensive analysis methods.

Inventive Principle:
Principle #16Partial or excessive action

3Speed

If Q margin calculation uses averaged BER, then processing speed is maintained, but reliability deteriorates due to undetected errors

Engineering Contradiction:
Improveprocessing speedVSAvoidsystem reliability
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent implements preliminary action by evaluating the BER of each codeblock before determining whether it exceeds the FEC threshold, allowing the system to proactively identify problematic codeblocks. This preliminary evaluation per codeblock enables timely detection of errors that would compromise reliability, while maintaining processing speed by using simple threshold comparisons rather than more complex analysis.

Inventive Principle:
Principle #10Preliminary action

4Reliability

If individual codeblock comparison is performed, then reliability is improved by accurate error identification, but loss of time increases due to additional processing steps

Engineering Contradiction:
Improvesystem reliabilityVSAvoidprocessing time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent applies local quality by focusing error detection efforts specifically on individual codeblocks that may contain errors, rather than uniformly processing all data with complex analysis. This localized approach improves reliability by accurately identifying error-prone codeblocks while minimizing time loss by avoiding unnecessary complex processing of error-free codeblocks.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS11394490B1Q margin
Publication Date: 2022.07.19 ACACIA TECH INC
  • US11394490B1 patent drawing
  • US11394490B1 patent drawing
  • US11394490B1 patent drawing

AI summary

A method, system, and ASIC chip for comparing a bit error rate (BER) to a forward error correction (FEC) threshold to determine a Q margin for a codeblock; wherein the BER corresponds to the number of errors in a given amount of data; where a codeblock of a FEC corresponds to the given amount of data; wherein the FEC threshold corresponds to the maximum amount of errors per codeblock that the FEC is able to remove per given amount of data; wherein the Q margin corresponds to a difference between the BER and the FEC threshold.