Q Node Discharge Circuit for Stable Display Gate Signals

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Transistors in gate driving circuits of display apparatuses experience high voltage drain stress (HVDS) leading to deterioration and threshold voltage shifts, resulting in voltage drops and potential gate driving circuit defects.

Innovation Solution

Incorporation of a 3a and 3b transistor series connection with a Qc node and a charging capacitor in the discharge path of the Q node, along with a Qb node connection, to alleviate HVDS and prevent voltage drops.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a single transistor is used to discharge the Q node voltage, then the circuit structure is simple, but the transistor experiences high voltage drain stress leading to deterioration and threshold voltage shifts

Engineering Contradiction:
Improvecircuit structureVSAvoidtransistor robustness
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The discharge path transistor is divided into two transistors (3a and 3b) connected in series. This segmentation reduces the source-drain voltage stress on each individual transistor by distributing the voltage across multiple devices, thereby improving reliability without significantly increasing overall circuit complexity.

Inventive Principle:
Principle #1Segmentation

2Manufacturing precision

If the threshold voltage of the discharge transistor shifts negatively due to manufacturing deviation, then the transistor may fail to maintain Q node voltage, but adding circuit complexity to prevent this is undesirable

Engineering Contradiction:
Improvethreshold voltage stabilityVSAvoidcircuit structure
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

By segmenting the discharge transistor into series-connected transistors 3a and 3b with intermediate node Qc, the circuit becomes less sensitive to threshold voltage shifts in individual transistors. The series configuration ensures that even if one transistor's threshold shifts, the other can compensate to maintain proper discharge function.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The intermediate node Qc acts as a mediator between the Q node and ground in the discharge path. This intermediate point allows for better voltage distribution and control, reducing the impact of threshold voltage variations on the overall Q node voltage maintenance.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Power

If a boosted high voltage is repeatedly applied to the Q node, then the gate signal output is enhanced, but the transistor experiences continuous high voltage drain stress causing deterioration

Engineering Contradiction:
Improvegate signal voltage levelVSAvoidtransistor operating life
Core Design Contradiction:
PowerVSDuration of action of stationary object

Solution Approach 1:

The series connection of transistors 3a and 3b in the discharge path segments the high voltage stress, allowing the Q node to be boosted to high voltage while each transistor experiences reduced individual stress, thereby extending operational life.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The Qc node serves as an intermediary that facilitates the discharge of the boosted high voltage from the Q node through a distributed path, reducing the peak voltage stress on any single transistor during repeated operation.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS12412534B2Display apparatus
Publication Date: 2025.09.09 LG DISPLAY CO LTD
  • US12412534B2 patent drawing
  • US12412534B2 patent drawing
  • US12412534B2 patent drawing

AI summary

A display apparatus includes a display panel including a pixel and a gate line connected to the pixel. The apparatus includes a gate driving circuit including a stage that outputs a gate signal to the gate line. The stage includes a first pull-up transistor and a first pull-down transistor that are connected to each other with a first output terminal, which outputs the gate signal, therebetween. The stage includes a Q node and a Qb node that are respectively connected to the first pull-up transistor and the first pull-down transistor. The stage includes a 3a transistor and a 3b transistor which are located in a discharge path of the Q node and are connected in series with each other with a Qc node therebetween, and whose gate electrodes are connected to the Qb node. The stage includes a charging capacitor connected to the Qc node.