QAFE Gate Stack Composition for Low-Hysteresis NC-FET Switching

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Solution Overview

Problem

The challenge in developing negative-capacitance field-effect transistors (NC-FETs) is to achieve steep subthreshold swing (SS) below 60 mV/decade while minimizing hysteresis and reducing the onset voltage, which is essential for low-power consumption and scalable transistor design, but current solutions face issues with asymmetric SS and high off-state leakage current.

Innovation Solution

The use of a quasi-antiferroelectric (QAFE) material in the gate stack of NC-FETs, which introduces negative capacitance without hysteresis, achieved by forming a QAFE layer of Hf1-xZrxO2 with a zirconium atomic percentage between 50% and 75%, allowing for operation at sub-60 mV/decade SS with reduced onset voltage and negligible hysteresis.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a ferroelectric material is used in the gate stack to achieve negative capacitance, then subthreshold swing below 60 mV/decade is achieved, but hysteresis and high off-state leakage current occur

Engineering Contradiction:
Improvesubthreshold swingVSAvoidhysteresis and off-state leakage current
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The patent changes the composition parameter of the gate stack by incorporating a specific ratio of HfO2 and ZrO2 (where Zr content is 20-80 atomic percent) to achieve QAFE properties. This compositional parameter change enables negative capacitance with reduced hysteresis and lower off-state leakage compared to conventional ferroelectric materials

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent uses a composite material system combining HfO2 and ZrO2 in specific proportions to create a quasi-antiferroelectric gate dielectric. This composite approach leverages the complementary properties of both materials to achieve negative capacitance effect while minimizing the harmful effects of hysteresis and leakage current

Inventive Principle:
Principle #40Composite materials

2Device complexity

If conventional MOSFET structure is used, then device simplicity is maintained, but subthreshold swing cannot go below 60 mV/decade

Engineering Contradiction:
Improvetransistor structureVSAvoidsubthreshold swing
Core Design Contradiction:
Device complexityVSMeasurement precision

Solution Approach 1:

The patent modifies the electrical parameter of the gate dielectric by using QAFE material with specific compositional ratios (Hf1-xZrxO2 where x=0.20-0.80), which enables negative capacitance effect and achieves subthreshold swing below 60 mV/decade while maintaining a relatively simple FET structure

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The QAFE material enables NC-FETs to operate at steep subthreshold swing with no hysteresis, reducing gate leakage current and achieving bi-directional SS below 60 mV/decade, thereby addressing the limitations of existing NC-FETs and improving power efficiency and scalability.

Implementation Method 1

a quasi-antiferroelectric (QAFE) material in the gate stack of NC-FETs, which introduces negative capacitance without hysteresis

Methodology Applied
Scientific EffectNegative capacitance: Capacitance

Implementation Method 2

forming a QAFE layer of Hf1-xZrxO2 with a zirconium atomic percentage between 50% and 75%

Methodology Applied
Scientific EffectQuasi-antiferroelectric polarization: Polarisation

Data Source

PatentUS11942546B2Semiconductor device and method for forming the same
Publication Date: 2024.03.26 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US11942546B2 patent drawing
  • US11942546B2 patent drawing
  • US11942546B2 patent drawing

AI summary

A method includes forming an interfacial layer over a substrate; forming a quasi-antiferroelectric (QAFE) layer over the interfacial layer, in which forming the QAFE layer comprises performing an atomic layer deposition (ALD) cycle, and the ALD cycle includes performing a first sub-cycle for X time(s), in which the first sub-cycle comprises providing a Zr-containing precursor; performing a second sub-cycle for Y time(s), in which the second sub-cycle comprises providing a Hf-containing precursor; and performing a third sub-cycle for Z time(s), in which the third sub-cycle comprises providing a Zr-containing precursor, and in which X+Z is at least three times Y; and forming a gate electrode over the QAFE layer.