QAT Hardware Failure Handling via CPU Software Fallback

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Solution Overview

Problem

The failure of Intel QuickAssist Technology (QAT) hardware accelerators in data storage systems poses a risk of systemic failure due to uncompleted and subsequent compression or decompression operations, as these operations cannot be executed when the QAT hardware is unavailable.

Innovation Solution

A method is implemented to detect QAT hardware failures, resubmit failed cryptography and compression operations to a general-purpose processor or another accelerator at a different node, and redirect subsequent operations accordingly, ensuring that data storage systems can continue to function without systemic failure by switching tasks between the QAT and CPU or between nodes in a dual configuration.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If QAT hardware accelerator is used for compression operations, then compression performance and efficiency are improved, but system reliability deteriorates when QAT hardware fails

Engineering Contradiction:
Improvecompression performanceVSAvoidsystem reliability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent introduces a fallback mechanism where the CPU acts as an intermediary backup when QAT hardware fails. The system monitors QAT health status and automatically redirects compression tasks from QAT to CPU software-based compression when hardware failure is detected, preventing systemic failure while maintaining operational continuity

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The system dynamically changes the compression execution parameter from hardware-accelerated (QAT) to software-based (CPU) by detecting QAT health status. This parameter switching allows the system to adapt to hardware failure conditions while maintaining compression functionality through alternative execution paths

Inventive Principle:
Principle #35Parameter changes

2Speed

If QAT hardware accelerator is used for compression operations, then compression speed is improved, but system complexity increases due to failure handling requirements

Engineering Contradiction:
Improvecompression speedVSAvoidfailure handling complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent implements a feedback mechanism where the system continuously monitors QAT hardware health status and automatically adjusts task allocation based on detected conditions. The health status feedback triggers automatic redirection of compression tasks between QAT and CPU, eliminating the need for complex manual failure handling procedures

Inventive Principle:
Principle #23Feedback

3Productivity

If QAT hardware accelerator is used for compression operations, then processing efficiency is improved, but risk of systemic failure increases when hardware fails

Engineering Contradiction:
Improveprocessing efficiencyVSAvoidsystemic failure risk
Core Design Contradiction:
ProductivityVSObject-affected harmful factors

Solution Approach 1:

The patent prepares a software-based compression fallback mechanism in advance (prior cushioning) that activates when QAT hardware fails. By pre-configuring the CPU software compression capability and health monitoring, the system cushions against the harmful effect of hardware failure before it causes systemic collapse, ensuring continuous operation

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

Data Source

PatentUS11194651B2Method for gracefully handling QAT hardware or CPU software failures by dynamically switching between QAT hardware and CPU software for data compression and decompression
Publication Date: 2021.12.07 EMC IP HLDG CO LLC
  • US11194651B2 patent drawing
  • US11194651B2 patent drawing
  • US11194651B2 patent drawing

AI summary

A method, apparatus, and system for handling a failure of a hardware cryptography/compression accelerator is disclosed. The operations comprise: detecting that a hardware cryptography/compression accelerator at a first data storage system has failed; determining one or more failed cryptography and/or compression operation tasks that were submitted to the hardware cryptography/compression accelerator but were not completed due to the failure of the hardware cryptography/compression accelerator; and performing a remedial operation in response to the hardware cryptography/compression accelerator failure to prevent a systemic failure.